Integrated Memory Circuit Multi-Functional Terminal High Voltage
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Solution Overview
Problem
Integrated memory circuits face challenges in simplifying their structure to provide an erase program high voltage for data writing, as conventional charge pumps occupy significant silicon surface area and increase costs, and existing solutions are not feasible due to the need for additional connection terminals.
Innovation Solution
The integrated memory circuit receives a second voltage greater than the supply voltage through a reception terminal, utilizing a voltage limiter regulator circuit, decoupling circuit, or rectifier circuit to supply this voltage to the memory without controlling its duration or shape, and includes a control circuit for executing memory commands and detecting the presence of the second voltage for synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If an embedded charge pump is used to generate erase program high voltage from supply voltage, then the circuit can provide the required high voltage for memory programming, but the silicon surface area occupied by capacitors and voltage regulation circuitry increases significantly
Solution Approach 1:
The patent extracts the charge pump and voltage regulation circuitry from the integrated memory circuit, removing the source of large silicon surface area occupation. The high voltage generation function is separated and relocated to an external device, while the integrated circuit retains only the essential memory cells and minimal interface circuitry.
Solution Approach 2:
The patent makes the reception terminal multi-functional by enabling it to accept both the supply voltage (Vdd) and the erase program high voltage (Vpp) through the same physical interface. This eliminates the need for dedicated high voltage terminals and allows the terminal to serve dual purposes: power supply during normal operation and high voltage input during programming operations.
2Power
If a dedicated connection terminal for erase program high voltage is added to the integrated circuit, then the high voltage can be supplied reliably, but the number of connection terminals increases contrary to current specifications
Solution Approach 1:
The reception terminal is designed to be universal, accepting both supply voltage and erase program high voltage through the same physical connection point. This multi-functionality eliminates the need for additional dedicated terminals while maintaining reliable high voltage supply capability.
Solution Approach 2:
The patent merges the supply voltage terminal and the erase program high voltage terminal into a single reception terminal. By combining these functions into one interface, the patent reduces the total number of connection terminals while ensuring both voltage types can be supplied reliably to the memory circuit.
3Power
If an embedded charge pump with voltage regulation circuitry is implemented, then the erase program voltage can be regulated to controlled amplitude and duration, but the circuit structure becomes more complex and costs increase
Solution Approach 1:
The patent extracts the voltage regulation circuitry (PPCT) from the integrated memory circuit and relocates it to an external programming device. This removal eliminates the complex regulation circuitry from the memory chip, simplifying its structure and reducing manufacturing costs while the external device provides the necessary voltage control.
Solution Approach 2:
The patent enables the external programming device to self-manage the high voltage generation and regulation functions. By transferring the voltage control responsibility to the external device, the integrated memory circuit focuses solely on its core memory function, achieving a cleaner separation of concerns and reduced internal complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the circuit structure, reduces silicon surface area usage, and lowers costs by eliminating the need for charge pumps and additional terminals, while ensuring effective data writing operations.
Implementation Method 1
a voltage limiter regulator circuit having an input linked to the reception terminal of the supply voltage and supplying the supply voltage when the second voltage is present on the reception terminal
Implementation Method 2
a decoupling circuit having an input linked to the reception or emission terminal of the data signal and an output linked to a supply node of the integrated circuit destined to receive the second voltage, the decoupling circuit being configured to prevent fluctuations of the data signal from reaching the supply node, and to transfer the second voltage to the supply node
Implementation Method 3
a rectifier circuit having an input linked to the reception terminal of the clock signal and an output linked to a supply node of the integrated circuit, to supply the second voltage to the supply node
Data Source
AI summary
The disclosure relates to an integrated circuit electrically powered by a supply voltage and comprising a memory electrically erasable and/or programmable by means of a second voltage greater than the supply voltage. The integrated circuit comprises means for receiving the second voltage by the intermediary of a reception terminal of the supply voltage or by the intermediary of a reception or emission terminal of a data or clock signal. Applicable in particular to electronic tags comprising a reduced number of interconnection terminals.