Memory Element Clearing via Ground Signal Elevation
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Solution Overview
Problem
Integrated circuit memory elements face challenges in efficiently clearing data while minimizing circuit real estate, as large clear transistors are required for reliable operation but consume excessive space, and small transistors are insufficient to drive signals effectively.
Innovation Solution
The implementation of control circuitry that temporarily weakens cross-coupled inverters by elevating the ground power supply signal during clear operations, allowing smaller clear transistors to effectively clear memory elements without consuming excessive space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large clear transistors are used to ensure reliable clear operations, then clear signal driving capability is improved, but circuit real estate consumption increases
Solution Approach 1:
The patent applies dynamics by making the clear transistor size adjustable rather than fixed. A control signal dynamically modifies the effective size of the clear transistor during clear operations, allowing it to be larger only when needed for reliable signal driving, and smaller during normal operation to save space. This is achieved through circuitry that temporarily enhances the clear transistor's driving capability only during clear operations.
Solution Approach 2:
The patent changes the parameter of transistor size dynamically. By using a control signal to modify the clear transistor's effective size (through techniques such as adjusting gate voltage or using transmission gate configurations), the system achieves high driving capability when needed while maintaining small physical footprint during normal operation. This parameter change allows the same transistor to serve dual purposes: small for space efficiency, large for reliable clearing.
2Area of stationary object
If small clear transistors are used to minimize circuit real estate, then area consumption is reduced, but signal driving capability deteriorates
Solution Approach 1:
The patent makes the clear transistor's effective size dynamic rather than static. During normal operation, the transistor remains small to save space. During clear operations, a control signal is applied that temporarily increases its effective driving capability, allowing it to overpower the cross-coupled inverters and reliably clear the memory element despite its small physical size.
Solution Approach 2:
The patent applies preliminary action by preparing the clear transistor for enhanced operation before the actual clear operation begins. A control signal is asserted in advance to configure the clear transistor for high-drawing operation, ensuring it has sufficient driving capability when the clear operation commences, then deasserted afterward to return to space-efficient mode.
Data Source
AI summary
Integrated circuits are provided that have memory elements. The memory elements may be organized in an array. Data such as programmable logic device configuration data may be loaded into the array using read and write control circuitry. Each memory element may store data using a pair of cross-coupled inverters. Power supply circuitry may be used to power the cross-coupled inverters. A positive power supply signal and a ground power supply signal may be provided to the inverters by the power supply circuitry. Each memory element may have an associated clear transistor. A clear control signal may be asserted to turn on the clear transistor when clearing the memory elements. A given one of the inverters in each memory element may be momentarily weakened with respect to the clear transistor in that memory element by using the power supply circuitry to temporarily elevate the ground power supply signal.