Memory Column Plane Layout for Single-Pass ECC and Metadata Access

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Solution Overview

Problem

Existing memory devices face limitations in retrieving a greater number of bits, including error correction information and metadata, in a single access pass without increasing latency or power consumption.

Innovation Solution

Implementing a memory device architecture with data column planes and an extra column plane to store metadata and error correction parity bits, allowing for single-pass access of codewords, data, metadata, and ECC information by using different column select signals to prefetch these elements together.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a two-pass architecture is used to retrieve metadata and ECC information, then the number of bits retrieved is increased, but the latency and power consumption increase

Engineering Contradiction:
Improvenumber of bits retrievedVSAvoidaccess latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent merges the retrieval of metadata, ECC information, and data into a single access pass by utilizing an extra column plane that can be simultaneously accessed with data column planes through coordinated column select signals. This combining of multiple information retrieval operations into one pass eliminates the latency and power overhead of sequential two-pass architectures while maintaining the ability to retrieve all necessary bits including metadata and ECC information

Inventive Principle:
Principle #5Merging (Combining)

2Quantity of substance

If a two-pass architecture is used to retrieve metadata and ECC information, then the number of bits retrieved is increased, but the power consumption increases

Engineering Contradiction:
Improvenumber of bits retrievedVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple information retrieval operations into a single access pass, eliminating the redundant power consumption associated with activating column select signals and sensing circuits in a second pass. The extra column plane is designed to be simultaneously accessible with data column planes, allowing metadata and ECC information to be retrieved without additional power expenditure

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If additional column planes are added to store metadata and ECC information, then the functionality is improved, but the device complexity increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidarchitecture complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The extra column plane is designed with multi-functionality, serving both as a storage location for metadata and ECC information and as an active participant in the single-pass retrieval process. By making the extra column plane universally accessible through the same column select signal mechanism as data column planes, the architecture avoids adding complex dedicated retrieval paths while maintaining enhanced functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260057955A1Apparatuses and methods for single-pass access of ECC information, metadata information or combinations thereof
Publication Date: 2026.02.26 MICRON TECHNOLOGY INC
  • US20260057955A1 patent drawing
  • US20260057955A1 patent drawing
  • US20260057955A1 patent drawing

AI summary

Apparatuses, systems, and methods for single-pass access of ECC information, metadata information, or combinations thereof. The memory array includes a number of column planes and an extra column plane. A memory device may be set in an x4 single-pass operational mode. In this mode, the memory may store data in a selected ones of the column planes, and metadata may be stored in the extra column plane. An error correction code circuit (ECC) may store parity bits associated with the data and metadata in non-selected ones of the column planes. In this manner, the data, metadata, and parity may be accessed as part of a single access of the memory array.