Memory Command Logging for Non-Volatile Storage Debugging
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Solution Overview
Problem
Debugging non-volatile memory systems is challenging due to the difficulty in obtaining accurate system logs, as existing solutions require unique debugging approaches for each memory system and may not allow access to physically unreachable memory chips, and can interfere with failure occurrences.
Innovation Solution
Implementing dedicated SRAMs within memory chips and storage devices to log memory commands and associated addresses, enabling debugging without tailoring solutions to specific memory configurations and allowing access to logs for identifying error causes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If firmware or hardware solutions are used to keep track of system logs, then logging capability is provided, but each memory system requires a unique debug solution increasing device complexity
Solution Approach 1:
The patent implements a universal logging mechanism using standard PCIe TRM interface that can be applied across different memory systems (CXL, HBM, GDDR, DDR5, etc.) without requiring custom solutions for each system type. The logging apparatus uses a standardized protocol and interface structure that works universally across various memory architectures and protocols.
2Ease of operation
If bus or logic analyzers are used to record system logs, then external logging is achieved, but physically unreachable memory chips cannot be accessed
Solution Approach 1:
The patent introduces an intermediary logging apparatus located within the memory subsystem that captures logs internally before they reach external analyzers. This intermediary component (logging module with buffer and controller) acts as a bridge between the memory chips and external debugging equipment, enabling access to logs from physically unreachable memory chips through the PCIe interface.
3Reliability
If bus or logic analyzers are used to record system logs, then logging is performed, but the analyzer may interfere with failure occurrence
Solution Approach 1:
The patent extracts the logging function from the external debugging equipment and places it internally within the memory subsystem. By taking out the logging capability from the external analyzer and embedding it in the memory device itself, the system can capture failure information without the external analyzer interfering with the natural failure occurrence or system operation.
4Adaptability or versatility
If dedicated SRAMs are implemented within memory chips to log commands, then unified logging mechanism is achieved, but additional memory resources are consumed
Solution Approach 1:
The patent segments the logging functionality into discrete components: dedicated SRAM buffers within each memory chip for storing command and address information, and a separate logging controller that manages the logging process. This segmentation allows the logging function to be distributed across multiple memory chips, with each chip having its own logging capability, thereby achieving a unified logging mechanism while efficiently utilizing memory resources.
Data Source
AI summary
A method, apparatus and system. The method includes: storing, in a memory circuitry, information on memory commands and associated addresses, the memory commands including read and write commands corresponding to associated addresses within memory chips of a storage device; in response to a determination of a read failure corresponding to at least one of the memory commands: performing a read operation on the information from the memory circuitry; and causing the information to be sent to a host of a computer system that includes the storage device, the information adapted to be used to implement a memory debugging operation for the memory chips.