3D Memory Through-Contact Isolation to Prevent Leakage

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Solution Overview

Problem

Existing 3D memory devices face challenges in preventing current leakage and short circuits due to the electrical coupling of through contacts with conductor layers, which affects their performance and reliability.

Innovation Solution

The implementation of isolators surrounding through contacts in both horizontal and vertical directions, isolating them from other portions of the conductor layers, thereby preventing electrical coupling and potential leakage or short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through contacts are used to penetrate conductor layers for electrical connection, then connectivity and performance are improved, but current leakage and short circuits occur due to electrical coupling between through contacts and conductor layers

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcurrent leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

An isolator layer is introduced as an intermediary between the through contact and the conductor layer. This isolator prevents direct electrical coupling while allowing the through contact to maintain its structural connection, thereby eliminating current leakage paths without compromising the electrical connectivity function of the through contact.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The through contact structure is segmented into distinct regions: a first portion extending through the dielectric layer, an isolator layer surrounding this first portion, and a second portion extending through the conductor layer. This segmentation separates the electrical isolation function from the electrical connection function, allowing each portion to perform its specific role without interference.

Inventive Principle:
Principle #1Segmentation

2Reliability

If isolators are added to prevent current leakage, then reliability is improved, but device complexity increases due to additional structural components

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolator layer is formed as an integrated part of the through contact structure rather than as a separate component. The isolator surrounds the first portion of the through contact in a unified structure, combining the isolation function with the existing through contact formation process, thereby minimizing additional structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The isolator is applied locally only to the first portion of the through contact that extends through the dielectric layer, rather than to the entire through contact structure. This localized application provides necessary isolation exactly where current leakage occurs while avoiding unnecessary material addition and structural complexity in other regions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12580019B2Semiconductor device and fabrication method thereof
Publication Date: 2026.03.17 YANGTZE MEMORY TECH CO LTD
  • US12580019B2 patent drawing
  • US12580019B2 patent drawing
  • US12580019B2 patent drawing

AI summary

A semiconductor device includes a memory cell wafer. The memory cell wafer includes a dielectric layer, a conductor layer over the dielectric layer, one or more through contacts penetrating through the dielectric layer and the conductor layer, and an isolator surrounding a region of the conductor layer and at least one of the one or more through contacts in a horizontal direction and extending vertically through the conductor layer to be connected to the dielectric layer. The region of the conductor layer surrounded by the isolator is isolated from other portions of the conductor layer. Each of the one or more through contacts includes a column part in the dielectric layer and a pad part in the conductor layer.