Memory Control Circuit Alternating Refresh Cycles

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Solution Overview

Problem

In memory devices, the retention time of memory cells decreases when the selected word line is frequently turned on, leading to potential data loss due to postponed refresh operations for other memory cells.

Innovation Solution

A memory device with a memory control circuit that alternately refreshes data between two memory cell arrays, comparing automatic refresh and row hammer refresh word line addresses to determine if they belong to the same array, and postponing the refresh of the row hammer address if they do, ensuring data preservation by refreshing it in the next cycle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional refresh operations are performed to solve row hammer events, then data loss prevention is improved, but the retention time of memory cells decreases due to frequent word line activation

Engineering Contradiction:
Improvedata loss preventionVSAvoidretention time
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The memory system is divided into two independent memory cell arrays (first and second arrays) that are refreshed alternately. This segmentation allows the refresh operations to be distributed across different arrays, preventing continuous activation of the same word lines and thereby maintaining retention time while still preventing data loss through systematic refresh coverage.

Inventive Principle:
Principle #1Segmentation

2Reliability

If other memory cells are preferentially refreshed constantly, then data loss in those cells is prevented, but the refresh time for row hammer affected cells is postponed causing data loss

Engineering Contradiction:
Improvedata integrity of non-row-hammer cellsVSAvoidrefresh delay for row hammer cells
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system implements periodic alternation between refreshing the first and second memory cell arrays. By switching between arrays in a periodic manner, the system ensures that row hammer affected cells in one array are refreshed before their retention time expires, while other cells in the alternate array are being refreshed. This periodic switching prevents both data loss in row hammer cells and excessive delay in refresh operations.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10424362B2Memory device and data refreshing method thereof
Publication Date: 2019.09.24 WINBOND ELECTRONICS CORP
  • US10424362B2 patent drawing
  • US10424362B2 patent drawing
  • US10424362B2 patent drawing

AI summary

A memory device and a data refreshing method thereof are provided. When an automatic refresh word line address and a row hammer refresh word line address belong to the same memory cell array, memory cells corresponding to the automatic refresh word line address are refreshed, and a time to refresh memory cells corresponding to the row hammer refresh word line address is postponed.