Semiconductor Memory Control Circuit Resistance Detection
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Solution Overview
Problem
In semiconductor memory devices with variable resistors, the dispersion in resistance values across memory cells makes it difficult to determine a suitable reference current for detecting changes in resistance states, leading to incomplete or abnormal operation termination.
Innovation Solution
A control circuit with a current mirror and reference current generating circuit is used to produce a mirror current and a delayed, adjusted reference current, allowing for reliable detection of resistance state transitions and proper operation termination by comparing the mirror current with the reference current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a fixed reference current is used for detecting resistance state changes, then the detection method is simple, but the detection accuracy deteriorates due to dispersion in resistance values across memory cells
Solution Approach 1:
The patent applies preliminary action by generating a reference current that matches the cell current at the start of the operation before the resistance state changes occur. This preliminary matching of currents allows for accurate detection of subsequent resistance changes, resolving the contradiction between detection accuracy and device complexity.
2Reliability
If the reference current is determined with a considerable margin to account for resistance value dispersion, then the operation becomes more robust, but the ability to detect resistance state changes deteriorates
Solution Approach 1:
The patent applies dynamics by making the reference current adaptive rather than fixed. The reference current generation circuit dynamically adjusts the reference current value based on the actual cell current, allowing the system to maintain both robustness and detection precision simultaneously. This dynamic adaptation resolves the contradiction between reliability and measurement precision.
3Measurement precision
If a single reference current value is used for all memory cells, then the system is simple to operate, but accurate detection cannot be achieved for cells with varying characteristics
Solution Approach 1:
The patent applies self-service by enabling each memory cell to generate its own appropriate reference current through the reference current generation circuit. The circuit automatically adapts to each cell's characteristics without requiring external intervention or manual adjustment, achieving both accurate detection and ease of operation simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that the reference current is tailored to each memory cell, enabling accurate detection of resistance state changes and reliable operation termination, even with varying cell characteristics.
Implementation Method 1
a current mirror circuit which generates a mirror current having a current value equal to that of a cell current flowing in the selected one of the memory cells
Implementation Method 2
detecting circuit which detects transition of a resistance state of the selected one of the memory cells based on a magnitude relation of the mirror current and the reference current
Data Source
AI summary
According to one embodiment, a semiconductor memory device comprises a memory cell array and a control circuit. The control circuit applies a certain potential difference to a selected one of the memory cells. The control circuit comprises a current mirror circuit, a reference current generating circuit, and a detecting circuit. The current mirror circuit produces a mirror current having a current value identical to that of a cell current flowing in the selected one of the memory cells. The reference current generating circuit produces a reference current, the reference current having a current value that differs from the current value of the mirror current by a certain current value. The detecting circuit detects transition of a resistance state of the selected one of the memory cells based on a magnitude relation of the mirror current and the reference current.