Memory Micro-Control Circuit Sequencing for Faster Read and Program
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Solution Overview
Problem
Existing memory systems face inefficiencies in operation time due to the need for multiple micro-control circuits to continuously monitor and enable each other, leading to prolonged programming, reading, and verification processes.
Innovation Solution
Implementing a control logic system where a primary micro-control circuit sends enabling signals to secondary micro-control circuits, allowing them to execute branch instructions independently, thereby reducing the need for continuous monitoring and enabling by the primary circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple micro-control circuits continuously monitor and enable each other, then control reliability is improved, but operation time increases
Solution Approach 1:
The control logic is segmented into a first micro-control circuit and a second micro-control circuit. The first circuit executes main process instructions while the second circuit executes branch instructions independently. This segmentation allows both circuits to operate in parallel without continuous mutual monitoring, reducing operation time while maintaining control reliability through clear functional division.
Solution Approach 2:
The second micro-control circuit is pre-configured to execute branch instructions independently based on conditions determined during the main process. This preliminary preparation of the second circuit's execution path allows it to operate without continuous enabling signals, reducing the time the first circuit would otherwise need to spend on continuous monitoring and enabling.
2Measurement precision
If the primary micro-control circuit continuously enables secondary circuits, then coordination accuracy is improved, but productivity decreases
Solution Approach 1:
The control functions are segmented between two micro-control circuits with distinct responsibilities. The first circuit handles main process coordination while the second circuit handles branch instructions independently. This segmentation maintains coordination accuracy through clear functional boundaries while significantly improving productivity by eliminating continuous enabling operations.
Solution Approach 2:
The second micro-control circuit is designed to execute branch instructions autonomously based on pre-determined conditions, without requiring continuous enabling signals from the first circuit. This self-service capability of the second circuit maintains accurate coordination while improving overall system productivity by reducing the burden on the first circuit.
Data Source
AI summary
The present disclosure provides methods of operating a memory, memories, and memory systems. An example memory includes a peripheral circuit including a first micro-control circuit, a second micro-control circuit, and a third micro-control circuit. The method includes: in response to executing a first operating instruction, sending, by the first micro-control circuit, a first signal to the second micro-control circuit; in response to the first signal, executing, by the second micro-control circuit, a second operating instruction; sending, by the second micro-control circuit, a second signal to the third micro-control circuit; and in response to the second signal, executing, by the third micro-control circuit, a third operating instruction.