Memory Control Method for Parity Bit Reduction
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Solution Overview
Problem
The existing error correction code schemes for memory data storage occupy a large space in memory, as parity bits required for error correction take up significant memory size, especially when correcting multiple-bit errors.
Innovation Solution
A control method for memory that performs a tendency check operation to determine the logical trend of data and parity bits, inverting data when trends differ and writing directly when trends match, to optimize data storage and reduce parity bit usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code schemes are used to improve data accuracy, then data reliability is improved, but memory space is significantly occupied by parity bits
Solution Approach 1:
The patent changes the parameter of data representation by inverting data bits based on the majority tendency (0 or 1) of the cell array. This parameter transformation allows the system to adapt to the dominant state of memory cells, reducing the number of bit flips needed during operation and thereby reducing the required parity bits for error correction
Solution Approach 2:
The patent applies inversion by flipping data bits when the data tendency differs from the cell array tendency. This inversion strategy transforms data into a form that matches the physical characteristics of the memory cells, reducing error rates and minimizing the overhead of error correction codes
2Reliability
If more parity bits are added to correct multi-bit errors, then error correction capability is improved, but memory efficiency deteriorates
Solution Approach 1:
The patent performs preliminary action by determining the tendency of data and cell array before writing operations. By pre-inverting data bits to match the dominant state of memory cells, the system reduces the likelihood of errors during storage and retrieval, thereby reducing the number of parity bits needed for correction while maintaining error correction capability
Solution Approach 2:
The patent changes the data state parameter based on the cell array's majority tendency. This dynamic parameter adjustment optimizes the data representation to match physical memory characteristics, reducing error rates and improving memory efficiency without sacrificing error correction capability
Data Source
AI summary
A control method for a memory is provided. In a test mode, a tendency check operation is performed for a cell array to define the tendency of the cell array. In a write mode: receiving external data; determining the tendency of the external data; comparing the tendency of the external data and the tendency of the cell array; inverting the external data and writing the inverted external data into the cell array in response to the tendency of the external data being different from the tendency of the cell array; and writing the external data into the cell array in response to the tendency of the external data being the same as the tendency of the cell array.