Memory Control Circuit Unit Decoding Optimization

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Solution Overview

Problem

The increasing number of read voltage sets in rewritable non-volatile memory modules leads to prolonged decoding times due to repetitive retry-read mechanisms, resulting in inefficiency and wasted time.

Innovation Solution

Categorizing read voltage sets into categories with representative sets to selectively choose the most suitable category for decoding operations, thereby reducing the need to execute all read voltage sets during retry-read mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the retry-read mechanism executes all read voltage sets to ensure decoding success, then the reliability of data reading is improved, but the decoding time increases significantly

Engineering Contradiction:
Improvedata reading reliabilityVSAvoiddecoding time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the read voltage sets into multiple categories (e.g., first read voltage category, second read voltage category) based on their characteristics. Each category contains a subset of read voltage sets, and the system only needs to execute retry-read mechanisms within the relevant category rather than all categories, thereby reducing time while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different read voltage categories are designed with different characteristics suitable for different storage states. The system selects the appropriate category based on the specific reading conditions, applying local optimization rather than using a uniform approach for all read operations, which reduces unnecessary iterations.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If the number of read voltage sets is increased to handle more storage states, then the versatility of the memory module is improved, but the complexity of the decoding process increases

Engineering Contradiction:
Improvestorage state coverageVSAvoiddecoding process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the comprehensive set of read voltage sets into organized categories, making the decoding process more manageable. Instead of treating all voltage sets uniformly, the system processes them in structured groups, reducing the cognitive and computational complexity while maintaining support for multiple storage states.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects which read voltage category to use based on the actual reading conditions and decoded information feedback. This dynamic adaptation allows the system to handle versatile storage states without always executing the full complex decoding process, optimizing the balance between versatility and complexity.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the retry-read mechanism is executed repeatedly to ensure decoding success, then the reliability of data retrieval is improved, but the productivity of the memory system decreases

Engineering Contradiction:
Improvedata retrieval reliabilityVSAvoidmemory access speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting read voltage sets into categories, the system limits the scope of retry-read operations to only the necessary categories rather than repeatedly attempting all categories. This segmented approach maintains reliability by focusing efforts where needed while improving productivity by avoiding unnecessary repeated iterations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses decoded information as feedback to determine whether further retry-read operations are necessary. Based on the feedback from decoding attempts, the system intelligently decides whether to proceed to the next voltage category or stop, preventing unnecessary productivity loss while ensuring reliable data retrieval when needed.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10636490B1Decoding method, memory control circuit unit and memory storage device
Publication Date: 2020.04.28 PHISON ELECTRONICS
  • US10636490B1 patent drawing
  • US10636490B1 patent drawing
  • US10636490B1 patent drawing

AI summary

A decoding method, a memory control circuit unit, and a memory storage device are provided. The method includes: configuring a plurality of read voltage categories, wherein the read voltage categories respectively have a plurality of representative read voltage sets; reading a first physical programming unit according to the representative read voltage sets and executing a decoding operation to obtain a plurality of decoded information; choosing a first read voltage category according to the plurality of decoded information; and reading the first physical programming unit according to the first read voltage sets in the first read voltage category and executing the decoding operation.