Memory Controller Bad Block Identification via Write-Verify Sequences

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Solution Overview

Problem

The initialization time of memory devices using multiple level cell (MLC) flash memories is increased, leading to higher manufacturing costs due to complex operations, necessitating a method to enhance control and efficiency without introducing negative side effects.

Innovation Solution

A method involving a controller that sends a last writing command to a specific non-volatile memory element to write data, followed by a read command to verify data integrity, identifying bad blocks and improving initialization efficiency by distinguishing between first, second, and last writing commands to ensure correct data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional initialization methods are used for MLC flash memories, then data storage capacity is improved, but initialization time increases significantly

Engineering Contradiction:
Improvedata storage capacityVSAvoidinitialization time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing bad block identification during the manufacturing process before the memory device is shipped. The controller identifies and marks bad blocks during factory initialization, so that these defective blocks are already known and can be excluded from future operations. This preliminary identification eliminates the need for time-consuming bad block detection during normal device operation or user initialization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements preliminary action by pre-programming a unique identifier (UID) into each memory device during manufacturing. This UID contains information about the device's configuration, including the number of erase blocks and other parameters. By having this information pre-stored, the device can skip lengthy initialization sequences that would otherwise be required to determine these parameters, thereby reducing initialization time significantly.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If comprehensive bad block detection is performed during initialization, then reliability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs comprehensive bad block detection as a preliminary action during the manufacturing process. The controller systematically tests each block to identify defects and marks bad blocks with a specific pattern (0xFF) in the block management table. This one-time comprehensive testing during manufacturing ensures high reliability while the cost is amortized over the production batch, making it more economical than performing equivalent testing for each individual device during customer initialization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements self-service by having the memory controller automatically perform bad block identification and management without requiring external intervention. The controller autonomously tests blocks, identifies defects, and updates the block management table. This automated self-testing reduces manufacturing complexity and cost compared to methods requiring external testing equipment or manual procedures.

Inventive Principle:
Principle #25Self-service

3Reliability

If multiple writing commands are sent to ensure data correctness, then data integrity is improved, but operation complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies feedback by implementing a verification mechanism where the controller writes test data to each block, then reads back the written data to verify correctness. The read operation provides feedback about whether the write operation succeeded, allowing the controller to identify bad blocks that fail to retain data properly. This feedback loop ensures data integrity while maintaining relatively simple operation through systematic testing.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent uses parameter changes by varying the write verification process based on block status. For blocks that pass the write-verify test, normal operation parameters are used. For blocks that fail, the controller changes the parameter state by marking them as bad in the block management table, thereby excluding them from future operations. This parameter-based classification simplifies subsequent operations by treating all good blocks uniformly while excluding bad blocks.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20170062060A1Method and controller for managing memory device
Publication Date: 2017.03.02 SILICON MOTION INC
  • US20170062060A1 patent drawing
  • US20170062060A1 patent drawing
  • US20170062060A1 patent drawing

AI summary

A method for managing a memory device includes: sending a last writing command to a specific non-volatile (NV) memory element in the memory device to write a set of data to a specific block of the specific NV memory element, rather than sending either a first writing command or a second writing command to the specific NV memory element, where these writing commands are utilized for writing to the same location at different times, respectively, in order to guarantee data correctness; and after writing the set of data to the specific block, sending a read command to the specific NV memory element to read stored data of the set of data from the specific block, and checking whether the stored data match the set of data to determine whether the specific block is a bad block.