Memory Controller Buffer Management for Random Read Optimization

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing multi-level mapping tables during random read operations, particularly in maintaining optimal buffer hit rates and reducing the overhead of updating and searching mapping tables.

Innovation Solution

The memory system incorporates a memory controller with a buffer that dynamically adjusts the capacity for storing different levels of mapping tables based on the random read range. When the read range meets a preset condition, the controller increases the ratio of capacity for the second-level mapping table, optimizing buffer hit rates and reducing the need for frequent updates and searches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the buffer capacity for storing mapping tables is increased, then the buffer hit rate is improved, but the device complexity and resource utilization are worsened

Engineering Contradiction:
Improvebuffer hit rateVSAvoidbuffer capacity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic adjustment of buffer capacity allocation for different levels of mapping tables based on random read range conditions. The controller adapts the buffer capacity for second-level and third-level mapping tables according to whether the read range exceeds a threshold, transforming a static buffer allocation into a dynamic one that responds to operational conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of buffer capacity allocation by adjusting the ratio of capacity for storing second-level mapping tables versus third-level mapping tables. When random read range meets a preset condition, the ratio for second-level mapping tables is increased, otherwise it is decreased, thereby optimizing buffer hit rate without permanently increasing total buffer capacity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the buffer capacity for mapping tables is dynamically adjusted, then the buffer hit rate is improved, but the control complexity and time overhead are worsened

Engineering Contradiction:
Improvebuffer hit rateVSAvoidcontrol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary judgment of the random read range condition before adjusting buffer capacity. By evaluating whether the read range meets the preset condition in advance, the controller determines the appropriate buffer capacity allocation strategy beforehand, avoiding complex real-time adjustments during the read operation itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the controller monitors the random read range and adjusts buffer capacity allocation accordingly. The adjustment is based on feedback from the read range condition, creating a closed-loop control system that optimizes buffer hit rate while maintaining manageable control complexity through condition-based decision making.

Inventive Principle:
Principle #23Feedback

3Reliability

If the ratio of capacity for second-level mapping table is increased, then the buffer hit rate for large read ranges is improved, but the capacity for third-level mapping table is reduced

Engineering Contradiction:
Improvebuffer hit rateVSAvoidcapacity for third-level mapping table
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent dynamically adjusts the ratio of buffer capacity allocated to second-level versus third-level mapping tables based on the random read range condition. When the read range meets the preset condition, the ratio for second-level mapping tables is increased; otherwise, it is decreased. This dynamic reallocation optimizes buffer hit rate for different access patterns without permanently sacrificing third-level mapping table capacity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12282435B2Memory system and method of operating thereof, storage medium and memory controller
Publication Date: 2025.04.22 YANGTZE MEMORY TECH CO LTD
  • US12282435B2 patent drawing
  • US12282435B2 patent drawing
  • US12282435B2 patent drawing

AI summary

According to one aspect of the present disclosure, a memory system is provided. The memory system may include at least one non-volatile memory device and a memory controller coupled to the at least one non-volatile memory device. A multi-level mapping table may be stored in the memory device. The multi-level mapping table may be configured to implement mapping from a logical address to a physical address. The memory controller may include a buffer. A portion of the multi-level mapping table may be stored in the buffer. The memory controller may be configured to perform a random read operation on the data stored in the memory device. In response to a random read range corresponding to the random read operation meeting a preset condition, the memory controller may be configured to adjust capacity for storing different levels of mapping tables in the buffer.