Memory Controller Buffering for Flash Write Performance
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Solution Overview
Problem
The existing memory devices, such as flash memory, face performance issues due to frequent 'sacrificed moving' operations, where small units of data written by a host apparatus are copied to another block, leading to impaired write-in performance, especially when the host apparatus writes in small units while the nonvolatile memory writes in larger units.
Innovation Solution
A memory controller that temporarily writes data in a nonvolatile semiconductor memory or cache memory in small units and then writes the data in larger units to a target block when the total amount reaches a predetermined unit, reducing 'sacrificed moving' and enhancing write-in performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If small unit data is written in nonvolatile memory using traditional methods, then data can be stored, but frequent sacrificed moving operations occur which impair write-in performance
Solution Approach 1:
The memory controller temporarily stores small unit data in a buffer memory before writing to the nonvolatile memory. This preliminary buffering action allows the system to accumulate data and then write it in larger units to the nonvolatile memory, avoiding frequent sacrificed moving operations and improving write-in performance.
Solution Approach 2:
A buffer memory is introduced as an intermediary between the host apparatus and the nonvolatile memory. This buffer memory temporarily holds data received from the host, allowing the memory controller to manage data transfer more efficiently by writing to the nonvolatile memory in larger units rather than immediately writing each small unit, thereby reducing the time taken for writing data.
2Productivity
If data is written in large units to nonvolatile memory, then write-in performance improves, but the system cannot handle small unit data writes from host apparatus
Solution Approach 1:
The data write-in process is segmented into two stages: first, small unit data is received and temporarily stored in the buffer memory; second, the buffer memory is flushed to the nonvolatile memory in larger units. This segmentation allows the system to accept small unit data from the host while efficiently writing to the nonvolatile memory in larger units, maintaining both adaptability and performance.
Solution Approach 2:
The buffer memory serves as an intermediary that bridges the mismatch between the host apparatus's small unit data write-in requirements and the nonvolatile memory's large unit write-in capabilities. It temporarily holds small unit data and enables the memory controller to write to the nonvolatile memory in optimized large units, thus maintaining versatility while improving performance.
Data Source
AI summary
The present invention provides a memory controller which includes a host interface connected to a host apparatus and receives a first data write-in unit of reception data, a memory interface connected to nonvolatile semiconductor memory in which is written a second data write-in unit of data larger than the first data write-in unit of data, and transmits the first data write-in unit of write-in data, and a central processing unit, which writes the reception data in a temporary write-in block of the nonvolatile semiconductor memory via the memory interface, reads out from the temporary write-in block the write-in data corresponding to area data when a total amount of reception data received by the host interface has reached amount of the second data write-in unit of the area data, and writes the area data including the read-out write-in data in a target block different from the temporary write-in block.