Memory Controller Out-of-Order Chunk Access for Coherency Bottlenecks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In non-volatile semiconductor memory modules, existing command-based coherency schemes struggle to efficiently manage concurrent host commands accessing common physical areas, leading to sequential execution and potential bottlenecks, especially when multiple commands overlap in memory access.
Innovation Solution
The implementation of an active chunk coherency list and coherency checker module within the memory controller, which splits host commands into chunks, evaluates dependencies between them, and defers dependent chunks until associated dependencies are cleared, allowing independent chunks to be submitted out of order for memory device access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If command based coherency scheme is used to ensure sequential execution of commands accessing common physical areas, then data consistency is maintained, but command execution efficiency deteriorates due to sequential processing
Solution Approach 1:
The patent segments host commands into smaller chunks and processes them individually through the chunk coherency scheme. By dividing commands into chunks, the system can identify and execute independent chunks in parallel while maintaining coherency for dependent chunks, thus resolving the contradiction between data consistency and execution efficiency.
Solution Approach 2:
The patent implements dynamic chunk coherency checking that adapts to the specific access patterns of each command. The coherency checker dynamically determines which chunks can be executed independently and which require sequential processing, allowing the system to optimize execution order based on real-time coherency requirements rather than enforcing rigid sequential execution.
2Reliability
If multiple host commands are executed one at a time in received order, then coherency is maintained, but memory access bottlenecks increase
Solution Approach 1:
The patent performs preliminary coherency checking on command chunks before execution. The coherency checker analyzes incoming commands and identifies independent chunks that can be executed immediately without waiting for previous commands to complete. This preliminary analysis enables out-of-order execution of independent chunks while maintaining coherency for dependent operations, reducing memory access time.
Solution Approach 2:
The patent introduces the chunk coherency checker as an intermediary between the host interface and memory device. This intermediary component buffers and reorders command chunks, allowing independent chunks to be forwarded to the memory device out of order while ensuring that dependent chunks wait for their prerequisites. This mediator resolves the contradiction by enabling parallel processing without compromising coherency.
3Device complexity
If sequential command execution is used, then implementation complexity is reduced, but system throughput decreases
Solution Approach 1:
The patent segments commands into chunks and implements coherency checking at the chunk level rather than requiring complex whole-command analysis. This segmentation simplifies the coherency management logic while enabling parallel execution of independent chunks, thereby increasing system throughput without significantly increasing implementation complexity.
Solution Approach 2:
The patent changes the granularity parameter of coherency checking from command-level to chunk-level. This parameter change enables finer-grained parallelism where independent chunks can be executed concurrently, improving system throughput. The chunk-based approach maintains relatively simple coherency logic compared to full command-level parallelism, balancing complexity and performance.
Data Source
AI summary
A non-volatile semiconductor memory module is disclosed comprising a memory device and memory controller operably coupled to the memory device, wherein the memory controller is operable to receive a host command, split the host command into one or more chunks comprising a first chunk comprising at least one logical block address (LBA), and check the first chunk against an active chunk coherency list comprising one or more active chunks to determine whether the first chunk is an independent chunk, and ready to be submitted for access to the memory device, or a dependent chunk, and deferred access to the memory device until an associated dependency is cleared.