Memory Controller Clock Switching for Fast Resume
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Solution Overview
Problem
Existing information processing devices face delays in becoming ready for data reading/writing operations after resuming from a standby state due to the sequential startup of high-frequency oscillators and memory initialization, which prolongs the time to process interrupts.
Innovation Solution
A memory control device with a clock switcher and control signal switcher that supplies a low-frequency clock initially and a high-frequency clock once stable, allowing memory initialization to start before the main clock is stable, enabling immediate data processing readiness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the high-frequency oscillator is started first and memory initialization is performed after the clock becomes stable, then the memory initialization can be completed reliably, but the time delay for the processor to be ready for data reading/writing increases
Solution Approach 1:
The patent applies preliminary action by initiating memory initialization before the high-frequency clock becomes stable. The memory controller starts the initialization sequence using a low-frequency clock signal while the high-frequency oscillator is still stabilizing, rather than waiting for clock stability before beginning initialization. This allows the memory initialization process to overlap with the clock stabilization period, reducing overall startup delay while ensuring reliable initialization completion.
Solution Approach 2:
The patent implements dynamics by using dynamic clock frequency switching during memory initialization. The system transitions from a low-frequency clock during the initialization phase to a high-frequency clock once initialization is complete. This dynamic frequency adjustment allows the system to balance between reliable initialization (using lower frequency) and fast operation (using higher frequency), resolving the contradiction between reliability and time delay.
2Use of energy by moving object
If power supply to memory is stopped in standby state, then power consumption is reduced, but the system takes longer to resume data operations after interrupt
Solution Approach 1:
The patent applies preliminary action by pre-initializing the memory controller and preparing the initialization sequence before entering standby state. When an interrupt occurs, the memory controller can immediately begin the initialization process without waiting for clock stabilization, as the initialization logic is already prepared and configured. This reduces the resume time after standby while maintaining power savings during standby.
Solution Approach 2:
The patent segments the clock system into two distinct clock sources: a low-frequency clock for initialization operations and a high-frequency clock for normal data operations. This segmentation allows the system to use the appropriate clock frequency for each operational phase, enabling fast resume by immediately switching to the pre-prepared low-frequency initialization clock upon interrupt, then transitioning to the high-frequency clock once initialization completes.
Data Source
AI summary
According to an embodiment, a memory control device controls a memory from/to which data are read/written by a processor. The memory control device includes a clock switcher and a control signal switcher. The clock receives as input a first clock and a second clock at a higher frequency than the first clock, supplies the first clock to the memory until the second clock becomes stable, and supplies the second clock after the second clock has become stable. The a control signal switcher starts supplying, to the memory, a first control signal for initializing the memory to a state allowing reading/writing of data by the processor while the first clock is being supplied to the memory, and supplies, to the memory, a second control signal according to the reading/writing of data by the processor, after the second clock is supplied to the memory and the memory is initialized.