Memory Controller Read-Voltage Adjustment for MLC Coupling Errors

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Solution Overview

Problem

Nonvolatile memory devices face challenges in precisely changing threshold voltages, leading to reduced read margins and increased error rates due to coupling effects from adjacent cells, especially in multi-level cell memory devices.

Innovation Solution

A method and system that involves re-reading memory cells using a second read voltage, generating a coupling group index based on data reliability decision bits and status estimation information, and performing error correction code decoding to compensate for coupling effects and improve data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple program states are used to increase storage capacity, then storage density is improved, but read margins become smaller and error rates increase

Engineering Contradiction:
Improvestorage capacityVSAvoidread margin
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a first read operation before the final read operation. This initial read provides status information about the memory cell state, which is then used to adjust the read voltage for the subsequent read operation, thereby improving the final read margin and reducing errors in MLC devices

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the read voltage parameter based on the status information obtained from the first read operation. By adjusting the read voltage according to the actual memory cell state, the system optimizes the read margin for each specific condition, thereby improving reliability while maintaining high storage capacity

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If adjacent memory cells are programmed, then storage capacity is utilized, but coupling effects cause threshold voltage shifts and increase error rates

Engineering Contradiction:
Improvestorage utilizationVSAvoidcoupling effect
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent implements feedback by using the status information obtained from the first read operation to determine the appropriate read voltage for the second read operation. This feedback mechanism allows the system to compensate for coupling effects and other disturbances, thereby maintaining high storage utilization while reducing error rates caused by adjacent cell programming

Inventive Principle:
Principle #23Feedback

3Measurement precision

If read voltage is adjusted to compensate for threshold voltage shifts, then read accuracy is improved, but additional read operations increase access time

Engineering Contradiction:
Improveread accuracyVSAvoidaccess time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by performing only two read operations instead of continuous or excessive reads. The first read provides sufficient status information to adjust the second read voltage, achieving accurate reading without the time penalty of multiple iterative reads, thus balancing read accuracy with acceptable access time

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20130124944A1Memory controller for nonvolatile memory device, memory system comprising memory controller, and related methods of operation
Publication Date: 2013.05.16 SAMSUNG ELECTRONICS CO LTD
  • US20130124944A1 patent drawing
  • US20130124944A1 patent drawing
  • US20130124944A1 patent drawing

AI summary

A nonvolatile memory device comprises a memory controller having a memory cell status estimator that generates status estimation information indicating the status of a memory cell based on status register data, a coupling group index selector configured to generate a select signal for selecting a page and coupling group index from the status estimation information, and a memory cell status value generator configured to map the status estimation information to the data reliability decision bits and the coupling group index and generate a status value of the memory cell for error correction code decoding.