Memory Controller Dynamic Retention Voltage Adjustment

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Solution Overview

Problem

Memory devices, such as SRAM, face challenges in retaining data during low-power modes while minimizing power consumption, as data can be lost due to voltage reduction, leading to potential data errors.

Innovation Solution

A controller for memory devices that adjusts voltage levels between operation and retention modes, using a power control section to apply varying voltages between a first and second retention voltage, with the second voltage being lower than the first, which is lower than the operation voltage, based on error information to optimize data retention and power savings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If voltage is reduced to minimize power consumption in low-power mode, then power consumption is reduced, but data retention reliability deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention reliability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies dynamics by making the retention voltage adjustable rather than fixed. The controller dynamically selects between a first retention voltage and a second retention voltage based on error detection results, allowing the system to adapt the voltage level to actual data retention needs and optimize the balance between power consumption and reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter dynamically based on detected errors. When errors are detected, the controller switches from the first retention voltage to the second retention voltage, adjusting the electrical parameter to maintain data integrity while minimizing power consumption during retention mode operation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a fixed retention voltage is used to ensure data retention, then data retention reliability is maintained, but power consumption cannot be optimized

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system transitions from a static, fixed retention voltage to a dynamic, adaptive voltage selection mechanism. The controller monitors error conditions and adjusts the retention voltage accordingly, enabling optimal power consumption while maintaining sufficient data retention reliability only when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The retention voltage parameter is made variable rather than fixed. The controller changes the voltage parameter based on real-time error detection, switching between different voltage levels to optimize the trade-off between power consumption and data retention reliability for each operational state.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If error detection is implemented to optimize retention parameters, then data retention reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidcontroller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements feedback by using error detection results to control the retention voltage selection. The controller receives error information, processes this feedback, and adjusts the retention parameters accordingly, creating a closed-loop system that automatically optimizes data retention reliability without requiring complex manual intervention.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9343183B2Memory device retention mode based on error information
Publication Date: 2016.05.17 NXP USA INC
  • US9343183B2 patent drawing
  • US9343183B2 patent drawing
  • US9343183B2 patent drawing

AI summary

A controller for a memory device has a power control section to control power to a memory element in an operation mode and in a retention mode. A monitoring section receives and monitors error information and a storage section stores a retention parameter. In the operation mode, the power control section causes an operation voltage to be applied to the memory element, and in the retention mode, the power control section causes a time-varying voltage to be applied to the memory. The power control section also causes the voltage across the memory element to change in the retention mode between a first retention voltage and a second retention voltage based on the retention parameter.