Memory Controller Fast Programming for Asynchronous Power Loss
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Solution Overview
Problem
Memory systems face data loss and integrity issues due to asynchronous power loss (APL) during data transmission or retrieval, as existing systems lack efficient methods to prioritize and save critical data before power loss, leading to corruption and increased latency.
Innovation Solution
A memory sub-system controller detects imminent power loss by monitoring power supply parameters and switches to a fast program mode, prioritizing the saving of designated data such as system data and metadata to non-volatile memory, altering operation priorities and changing programming speed to ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If existing capacitor-based power loss protection is used, then data retention during power loss is possible, but the capacitors cannot sustain power long enough to complete pending operations
Solution Approach 1:
The system changes the programming speed parameter by switching to a fast program mode when power loss is detected. This accelerates the data writing process to non-volatile memory, reducing the time required to complete pending operations within the limited capacitor sustenance window.
Solution Approach 2:
The system detects impending power loss and preemptively switches to fast program mode before the capacitor is fully depleted. This preliminary action ensures that critical data is written to non-volatile memory while still having power available, preventing data loss from incomplete operations.
2Reliability
If normal programming speed is used during power loss, then data can be written to non-volatile memory, but recovery time increases and performance degrades
Solution Approach 1:
The system dynamically adjusts the programming speed based on power availability. During normal operation, standard programming speed is used for optimal performance. When power loss is detected, the system transitions to fast program mode to prioritize data integrity, and returns to normal mode after recovery, thus adapting performance to power conditions.
3Productivity
If operation priorities are not altered during power loss, then normal operations continue, but data loss occurs due to incomplete operations
Solution Approach 1:
The system detects power loss conditions and preemptively alters operation priorities to favor critical data saving operations. By switching to fast program mode and prioritizing writes to non-volatile memory before the capacitor depletes, the system ensures data integrity while minimizing operational interruptions.
Data Source
AI summary
A system can include a plurality of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices, to perform operations including: determining whether a parameter of a power supply of the volatile memory device satisfies a threshold criterion; responsive to determining that the parameter of the power supply satisfies the threshold criterion, modifying a value of a parameter of a program operation; and programming, using the modified value of the parameter, designated data stored on the volatile memory device to a designated location on the non-volatile memory device.