Memory Controller Host Buffer Region Segmentation

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Solution Overview

Problem

Current semiconductor memory systems face challenges in optimizing the size of the working memory used by memory controllers, as larger sizes increase manufacturing costs and improve operating performance, but also require significant internal memory capacity for error correction and backup data storage, which can be limiting in devices with limited internal memory.

Innovation Solution

A data reading method that utilizes an internal memory with a host buffer region to store backup data, allowing error correction and data processing without occupying the processing region, thereby reducing the required capacity and cost while maintaining performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the size of the working memory is increased, then the operating performance of the memory controller is improved, but the manufacturing cost is increased

Engineering Contradiction:
Improveoperating performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent divides the internal memory into two distinct regions: a processing region for error correction operations and a host buffer region for data storage. This segmentation allows the host buffer region to be utilized for storing backup data, thereby reducing the burden on the processing region and enabling more efficient use of the overall memory resources, which improves operating performance without proportionally increasing manufacturing cost

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The host buffer region, which traditionally serves only for data storage, is given a dual function by also serving as storage for backup data required for error correction. This multi-functionality reduces the need for dedicated backup data storage space in the processing region, effectively increasing the available working memory capacity without adding physical memory components, thus improving performance while controlling manufacturing costs

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If the size of the working memory is decreased, then the manufacturing cost is reduced, but the operating performance is degraded

Engineering Contradiction:
Improvemanufacturing costVSAvoidoperating performance
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent implements dynamic management of memory regions where the processing region and host buffer region can flexibly allocate their capacities. The host buffer region dynamically serves dual purposes (data storage and backup data storage), allowing the system to adapt memory resource allocation based on operational needs, thereby maintaining high operating performance with reduced overall memory capacity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the functional parameters of the host buffer region by assigning it dual functionality. This parameter change allows the region to serve both as a data buffer and as backup data storage, effectively increasing the available working memory capacity without increasing the physical memory size, thus maintaining performance while reducing manufacturing cost

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the internal memory capacity is increased to store backup data, then the error correction capability is improved, but the device complexity is increased

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By segmenting the internal memory into processing and host buffer regions, the patent provides a structured approach to storing and managing backup data. This segmentation simplifies the control logic for error correction operations by clearly defining which region contains the data to be corrected and which contains the backup data, thereby improving error correction capability without proportionally increasing device complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The host buffer region acts as an intermediary between the nonvolatile memory and the processing region. It serves as a mediator that holds both original data and backup data, facilitating error correction operations without requiring complex direct management between the processing unit and multiple storage locations, thus improving reliability while managing device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9552896B2Memory controller and method of reading data from nonvolatile memory by memory controller
Publication Date: 2017.01.24 SAMSUNG ELECTRONICS CO LTD
  • US9552896B2 patent drawing
  • US9552896B2 patent drawing
  • US9552896B2 patent drawing

AI summary

Provided are a nonvolatile memory and a data reading method of reading data from a nonvolatile memory by the memory controller. The data reading method includes reading data from memory cells of the nonvolatile memory, storing the read data in the internal memory, overwriting some of the read data stored in the internal memory with backup data, performing an error correction operation using the backup data stored in the internal memory, and overwriting the backup data stored in the internal memory with data corrected by the error correction operation.