Memory Controller Interleave Write Timing for Current Reduction
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Solution Overview
Problem
Flash memory cards face increased current consumption during high-speed data transfer, which can lead to higher power consumption and heat generation, posing challenges for portable devices.
Innovation Solution
A memory system that includes a memory unit with nonvolatile chips, a memory controller, and a timer control unit, which allows for parallel and interleave control methods to manage data transfer by shifting the timing of write operations across multiple chips, thereby reducing average current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is transferred at high speed to flash memory, then writing speed is improved, but current consumption increases
Solution Approach 1:
The patent divides the writing operation into two distinct phases: a first writing period where data is written to first flash memory chips, and a second writing period where data is written to second flash memory chips. This segmentation allows the system to distribute the high-current writing operations across different time intervals, preventing simultaneous peak current draws that would occur with parallel writing to all chips, thus reducing overall current consumption while maintaining high writing speed capability
Solution Approach 2:
The patent implements periodic writing operations by alternating between writing to first flash memory chips and second flash memory chips. The controller performs writing operations in repeated cycles: first to the first chips, then to the second chips, creating a periodic pattern of high-current operations. This periodic action spreads the current consumption over time, reducing the average current draw while preserving the overall writing throughput
2Productivity
If multiple chips write data simultaneously, then productivity is improved, but instantaneous current consumption increases
Solution Approach 1:
The patent segments the chip set into two groups: first flash memory chips and second flash memory chips. By writing to these two groups sequentially in different time periods rather than simultaneously, the system maintains high productivity through rapid alternation while preventing the harmful effect of instantaneous current spikes that would result from all chips writing at once
Solution Approach 2:
The controller performs preliminary action by completing writing operations to the first flash memory chips before initiating writing to the second flash memory chips. This preliminary completion of one writing phase ensures that the high-current operation is fully established and managed before transitioning to the next phase, allowing for better current management while maintaining overall writing efficiency
Data Source
AI summary
According to an embodiment, a memory system includes a memory unit, a memory controller, a timer and a timer control unit. The memory unit has nonvolatile first and second chips capable of holding data. The memory controller transfers data received from host equipment simultaneously to the first and second chips. The timer measures a lapse of preset shift time. The timer control unit starts writing of data into the second chip immediately after the lapse of the shift time.