Memory Controller Peak Power Matching for Host Compatibility

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Solution Overview

Problem

The inconsistency in peak power support by different host devices limits the operating power of memory systems, leading to suboptimal storage performance as manufacturers restrict power to accommodate the lowest common denominator, thereby reducing adaptability and performance.

Innovation Solution

A system and method where the memory system senses the peak power capability of the host and adjusts its power management policy accordingly, using an identifier to determine optimal parameters such as clock frequency, parallelism, and latency to match the host's capabilities, ensuring full storage performance without exceeding the host's power limits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory system operates at high peak power to achieve full storage performance, then storage performance is improved, but the host may not support this power level causing compatibility issues

Engineering Contradiction:
Improvestorage performanceVSAvoidhost compatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The memory system dynamically adjusts its peak power management policy based on the host's capabilities. The system includes a peak power management unit that can modify operating parameters such as clock frequency, parallelism, and latency according to the detected host peak power support level, enabling the system to adapt between high performance and compatibility requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters including clock frequency, flash memory parallelism, and I/O request latency based on the host's peak power capability. By adjusting these parameters, the memory system can operate at full performance when the host supports high power, or reduce power consumption to maintain compatibility with hosts having lower power support

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the memory system uses a conservative peak power limit to ensure compatibility with all hosts, then host compatibility is improved, but storage performance is reduced

Engineering Contradiction:
Improvehost compatibilityVSAvoidstorage performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system implements feedback by detecting the host's peak power capability through identification information exchanged between the host and memory controller. Based on this feedback, the peak power management unit adjusts the operating policy to match the host's actual capabilities, eliminating the need for conservative power limits while ensuring compatibility

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The peak power management policy is made dynamic rather than fixed. The system can switch between different power management policies based on real-time detection of host capabilities, allowing full performance when supported and conservative operation when necessary, thereby eliminating the trade-off between compatibility and performance

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If the memory system implements dynamic peak power detection and adjustment, then adaptability to different hosts is improved, but system complexity increases

Engineering Contradiction:
Improvehost adaptabilityVSAvoidpower management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The peak power management unit performs multiple functions including detecting host capabilities, determining appropriate power policies, and adjusting operational parameters. By consolidating these functions into a single management unit, the system achieves high adaptability without proportionally increasing overall system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260030156A1Electronic devices, memory systems, and power control methods
Publication Date: 2026.01.29 YANGTZE MEMORY TECH CO LTD
  • US20260030156A1 patent drawing
  • US20260030156A1 patent drawing
  • US20260030156A1 patent drawing

AI summary

The present disclosure discloses an electronic device, a memory system, and a power control method, which belong to the field of storage technology. A disclosed electronic device can comprise a host and a memory system. The host can comprise a power management unit, and a first interface configured to send an identifier indicating a peak power capability supported by the power management unit. The memory system can comprise at least one memory device coupled with the host, a second interface communicated with the first interface and configured to receive the identifier, and a memory controller coupled to the memory device and configured to determine a peak power management policy matches the peak power capability according to the identifier.