Memory Controller Read Retry and Bit Line Control
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Solution Overview
Problem
Existing memory controllers face challenges in effectively handling read operation failures in storage devices, particularly in determining when a read operation has failed and in efficiently retrying the operation or setting control times for bit lines to ensure data integrity.
Innovation Solution
A memory controller with a read operation controller, read fail determiner, and read fail processor that assesses read data to determine operation success or failure, generates read information, and selects appropriate retry operations or sets bit line control times based on this information, including using a read retry table and bit line setting table to optimize read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read retry operations are performed multiple times, then data integrity is improved, but operation time increases
Solution Approach 1:
The patent implements dynamic read retry operations where the controller adjusts retry parameters based on the type of read failure detected. Different retry strategies are applied depending on whether the failure is due to bit line issues, page buffer problems, or other errors, optimizing the balance between reliability and time consumption.
Solution Approach 2:
The controller changes operational parameters during retry operations, including adjusting read voltages, modifying bit line precharge times, and altering page buffer configuration. These parameter adjustments enable effective retry without unnecessarily extending operation time.
2Reliability
If bit line control time is increased, then read operation reliability is improved, but operation speed decreases
Solution Approach 1:
The patent applies different control times to different bit lines based on their specific requirements. Rather than uniformly increasing control time for all bit lines, the controller identifies which specific bit lines need extended control time and applies adjustments only to those, maintaining overall operation speed while improving reliability where needed.
Solution Approach 2:
The bit line control time is dynamically adjusted based on detected read failures. The controller modifies control times in response to specific failure conditions, enabling reliability improvement without permanently reducing operation speed for successful reads.
3Reliability
If read failure detection is made more precise, then data integrity is improved, but detection complexity increases
Solution Approach 1:
The patent segments read failure detection into distinct categories (bit line failures, page buffer failures, other failures). By classifying failures into specific types, the system achieves precise detection without requiring overly complex detection mechanisms, as each failure type has dedicated detection and handling procedures.
Solution Approach 2:
The controller implements feedback mechanisms that use read data to determine whether read operations succeeded or failed, and to identify the type of failure. This feedback-driven approach enables precise failure detection with manageable complexity, as the system only needs to implement detection logic for specific failure modes based on observed read outcomes.
Data Source
AI summary
Provided herein may be a memory controller and a method of operating the same. The memory controller may include a read operation controller configured to provide a read command to a memory device and receive read data corresponding to the read command, a read fail determiner configured to determine, based on the read data, whether a read operation has passed or failed, and to generate read information including a result of the read operation and information about performance of the read operation and a read fail processor configured to select, based on the read information, one of a read retry operation, among a plurality of read retry operations, to be performed on the selected page and an operation of setting a control time for a bit line coupled to the selected page, and to control the memory device to perform the selected operation.