Memory Controller Dynamic Read Voltage Adjustment

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Solution Overview

Problem

NAND flash memory devices face errors during data reading due to changes in the distribution of charge accumulation in floating gates, leading to malfunction states like read disturbance and data retention, where the optimal read voltage for minimizing errors cannot be determined effectively by existing methods.

Innovation Solution

A memory controller with a distribution acquisition unit, identification unit, and setting unit that analyzes the threshold voltage distribution of memory cells to identify malfunction states and correct the read voltage based on the type of defective mode, ensuring minimal error occurrence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed read voltage is used for reading data from NAND flash memory, then the reading operation is simple and fast, but errors occur due to changes in charge distribution in floating gates under stress conditions

Engineering Contradiction:
Improvereading accuracyVSAvoidvoltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The read voltage is changed from a fixed value to a dynamically adjustable parameter. The memory controller identifies the defective mode (read disturbance or data retention) and selects different read voltages accordingly: a first read voltage for read disturbance conditions and a second read voltage for data retention conditions. This dynamic adaptation resolves the contradiction by maintaining high reading accuracy through stress-level-aware voltage selection while keeping the control mechanism relatively simple through predefined voltage schemes.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the read voltage is adjusted to minimize errors, then reading accuracy improves, but the time required to determine the optimal voltage increases

Engineering Contradiction:
Improvereading accuracyVSAvoidvoltage determination time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary identification of the defective mode (read disturbance or data retention) before the actual read operation. By detecting stress levels and determining the type of malfunction in advance, the memory controller can directly select the appropriate read voltage without needing to perform time-consuming voltage sweeping or iterative optimization during the read operation itself. This preliminary classification approach resolves the contradiction by enabling accurate voltage selection while minimizing time loss through efficient mode identification.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10014059B2Memory controller, memory control method, and coefficient decision method
Publication Date: 2018.07.03 KIOXIA CORP
  • US10014059B2 patent drawing
  • US10014059B2 patent drawing
  • US10014059B2 patent drawing

AI summary

According to one embodiment, a distribution of threshold voltages of a plurality of memory cells is acquired from a nonvolatile memory which includes the plurality of memory cells, a malfunction state occurring in the nonvolatile memory is identified based on a shape of the distribution, and a read voltage when data is read out of the nonvolatile memory is set to a voltage value corresponding to a type of the malfunction state.