Memory Controller Read Voltage Selection for Flash Block Groups

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Solution Overview

Problem

The existing memory systems face inefficiencies in operating speed due to the need for multiple read voltages to accurately read data stored in memory cells, particularly when storing 2-bit data, which complicates the process and slows down operations.

Innovation Solution

A memory system and method that categorize memory blocks based on program operations performed, using a memory controller to determine the appropriate read voltage level for LSB data read operations by checking memory state information, thereby simplifying the read process and enhancing operating speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple read voltages are used to accurately read 2-bit data from memory cells, then measurement precision is improved, but operating speed deteriorates

Engineering Contradiction:
Improvedata read accuracyVSAvoidoperating speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent divides the memory block into two groups: first memory block group storing only LSB data and second memory block group storing both LSB and MSB data. The controller segments the read operation by determining which group the selected block belongs to and applying the appropriate read voltage (first read voltage for LSB-only blocks, second read voltage for LSB-MSB blocks), avoiding the need to use multiple voltages for every read operation and thus improving operating speed while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts the read voltage based on the storage mode of the selected memory block. The controller determines whether the block stores 1-bit or 2-bit data and selectively applies different read voltage levels accordingly. This dynamic adaptation allows the system to optimize between accuracy and speed for each specific read operation rather than using a fixed conservative approach.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If different read voltages are applied based on data storage mode, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveread voltage selection accuracyVSAvoidcontrol circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary classification of memory blocks into two groups during the program operation phase. Blocks are pre-marked or configured to indicate whether they will store only LSB data or both LSB and MSB data. When a read operation occurs, the controller simply checks this pre-established classification information and applies the corresponding read voltage, avoiding complex real-time analysis and reducing control circuit complexity.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If 2-bit data is stored in memory cells, then data storage capacity is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedata storage capacityVSAvoidthreshold voltage distribution control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent segments the memory system into blocks with different storage modes (LSB-only and LSB-MSB). By separating these modes into distinct block groups, the system can apply different threshold voltage distribution requirements to each group. LSB-only blocks use simpler single-level programming while LSB-MSB blocks use two-stage programming, allowing the system to achieve high storage capacity without requiring all blocks to meet stringent manufacturing precision requirements.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8565022B2Memory system and method of operating the same
Publication Date: 2013.10.22 SK HYNIX INC
  • US8565022B2 patent drawing
  • US8565022B2 patent drawing
  • US8565022B2 patent drawing

AI summary

A memory system includes a flash memory device including a first memory block group on which a least significant bit (LSB) program operation has been performed and a program operation on another bit has not been performed and a second memory block group on which both the LSB program operation and a most significant bit (MSB) program operation have been performed and a memory controller configured to check which of the first and second memory block groups a memory block selected for an LSB data read operation belongs to and set a level of a read voltage for the LSB data read operation of the selected memory block.