Memory Controller Recovery for Power Interruption
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Solution Overview
Problem
Existing memory systems face complexity and performance deterioration due to power interruptions during data processing, leading to incomplete program operations and inefficient recovery processes.
Innovation Solution
A memory system with a controller that records program information in a list before power-off, allowing for precise recovery of incomplete operations upon power-on, using a bit map to track program start and end information across multiple memory blocks and pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory system performs program operations on multiple pages across multiple memory blocks without interruption handling, then productivity is improved through continuous data processing, but reliability deteriorates due to incomplete program operations when power off occurs
Solution Approach 1:
The controller records program information (block address, page address, operation status) in a list before power off occurs. This preliminary recording of operation status allows the system to resume incomplete program operations after power restoration, ensuring reliability while maintaining continuous data processing capability
Solution Approach 2:
The system implements a feedback mechanism where the controller checks the recorded program information in the list after power on to identify incomplete program operations. This feedback loop ensures that any operations interrupted by power off are detected and completed, resolving the reliability issue while preserving productivity
2Reliability
If the memory system implements comprehensive recovery operations for all memory blocks after power off, then reliability is improved by ensuring data integrity, but device complexity increases due to additional control mechanisms
Solution Approach 1:
The recovery mechanism is segmented to operate only on specific memory blocks that had incomplete program operations, rather than all memory blocks. The controller identifies affected blocks through the recorded program information and applies recovery operations selectively, reducing complexity while maintaining data integrity
Solution Approach 2:
The patent extracts only the necessary program information (block address, page address, operation status) into a separate list structure. This extraction allows the recovery mechanism to focus solely on incomplete operations without managing the entire memory system state, simplifying the control mechanism while ensuring reliability
Data Source
AI summary
A memory system includes: a memory device comprising a plurality of memory dies, each memory die including a plurality of planes, each plane including a plurality of memory blocks, each memory block including a plurality of pages, each page including a plurality of memory cells in which data is stored; and a controller suitable for, after a first time when the memory system in a power-on state performs a program operation corresponding to a write command received from a host, on first pages of the memory blocks, and records program information on the program operation in a list, in the case where power off occurs at a second time while the memory system performs a program operation on second pages of the memory blocks, checking the program information recorded in the list after the memory system is changed from a power-off state to the power-on state at a third time, and performing a recovery operation for the memory blocks for which a program operation was not completed due do the power off.