Memory Controller Reference Voltage Calibration Circuit

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Solution Overview

Problem

Existing memory controllers face challenges in accurately determining logic one and logic zero values due to varying voltage levels caused by source and termination resistances in driver and receiver circuits, leading to potential incorrect signal comparisons.

Innovation Solution

The memory controller incorporates detection circuitry to generate a target reference voltage signal, which is used to calibrate the reference voltage signal, and includes a comparator to produce output signals identifying logic one or logic zero values, with transistors and resistors forming a circuit to control the voltage level and selectively enable/disable current draw for precise calibration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a fixed reference voltage is used for signal comparison, then the comparator operation is simple, but the logic value determination becomes inaccurate due to voltage variations from source and termination resistances

Engineering Contradiction:
Improvelogic value determination accuracyVSAvoidreference voltage calibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing reference voltage calibration before normal memory operations. The memory controller calibrates the reference voltage signal using detection circuitry that measures actual signal voltages from the memory device and adjusts the reference voltage accordingly. This pre-calibration ensures accurate logic value determination throughout subsequent operations without requiring continuous complex adjustments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through detection circuitry that continuously monitors the voltage levels of data signals received from memory and feeds this information back to adjust the reference voltage signal. The feedback mechanism compares actual signal voltages (which vary due to source and termination resistances) with the reference voltage, and automatically adjusts the reference voltage to maintain accurate logic value determination despite voltage variations.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If the reference voltage is continuously adjusted to match varying signal voltages, then measurement accuracy is maintained, but calibration time and processing overhead increase

Engineering Contradiction:
Improvesignal comparison accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The calibration is performed as a preliminary action during memory controller initialization or setup phase, before normal read/write operations begin. This approach maintains high measurement precision during actual operations while minimizing time loss, as the reference voltage is established once based on initial measurements rather than being continuously adjusted during data processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs periodic calibration rather than continuous adjustment, where the reference voltage is recalibrated at predetermined intervals or under specific conditions (such as temperature changes or voltage fluctuations). This periodic approach maintains signal comparison accuracy while significantly reducing the time overhead compared to continuous calibration, as the system operates with a stable reference voltage between calibration events.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9111603B1Systems and methods for memory controller reference voltage calibration
Publication Date: 2015.08.18 ALTERA CORP
  • US9111603B1 patent drawing
  • US9111603B1 patent drawing
  • US9111603B1 patent drawing

AI summary

An integrated circuit may include a memory controller that interfaces with memory via one or more ports. A given port may be coupled to a comparator that receives data signals from the memory and a reference voltage signal and produces a corresponding output signal that identifies whether the data signals are logic one signals or logic zero signals. The memory controller may include detection circuitry coupled to the port that produces a target reference voltage signal for calibration of the reference voltage signal. The memory controller may include circuitry that produces the reference voltage signal based on control signals received from control circuitry. The control circuitry may generate the control signals to calibrate the reference voltage signal based on the target reference voltage.