Memory Controller Refresh Scheduling for Power Savings
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Solution Overview
Problem
Current memory controllers face challenges in coordinating power mode switching and refresh operations, leading to increased energy consumption and performance degradation in high-density DRAM devices, as intelligent low power mode switching and intelligent refresh scheduling techniques often conflict with each other, limiting their effectiveness.
Innovation Solution
The described embodiments coordinate the scheduling of refresh operations in active mode and low power mode switching to self-refresh mode, scheduling required refreshes during predicted longer idle periods and when the number of postponed refreshes is high, allowing the memory module to enter self-refresh mode for increased power savings while minimizing performance interruptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operations are serviced immediately in active mode, then data integrity is maintained, but power consumption increases and performance degrades
Solution Approach 1:
The patent applies preliminary action by predicting future idle periods in advance and scheduling refresh operations to occur during these predicted idle times. The memory controller analyzes historical access patterns to forecast when the memory will be idle, then proactively schedules refresh commands during these periods before they are actually needed, ensuring data integrity is maintained while avoiding conflicts with active memory operations.
Solution Approach 2:
The patent implements dynamics by making the refresh scheduling adaptive and flexible rather than fixed. The memory controller dynamically adjusts refresh timing based on real-time memory access patterns, workload conditions, and predicted idle periods. This dynamic approach allows the system to optimize the balance between data integrity and power consumption by shifting refresh operations to optimal moments determined by actual system behavior.
2Use of energy by moving object
If refresh operations are delayed to idle periods, then power consumption is reduced, but data integrity may be compromised
Solution Approach 1:
The patent applies feedback by continuously monitoring memory access patterns and using this information to validate and adjust refresh scheduling decisions. The memory controller receives feedback about actual memory usage, compares it with predicted idle periods, and uses this feedback to ensure that refresh operations are scheduled at appropriate times when they will not compromise data integrity, while still achieving power savings.
3Reliability
If more rows are refreshed per operation to handle high density, then refresh coverage increases, but refresh time increases
Solution Approach 1:
The patent applies segmentation by dividing the refresh operation into smaller, more manageable segments that can be distributed across multiple idle periods. Rather than attempting to refresh all rows in a single large operation during one idle period, the memory controller segments the refresh workload and schedules multiple smaller refresh operations across different predicted idle periods, reducing the time impact of each individual refresh while maintaining complete coverage.
Data Source
AI summary
Provided are a memory system, device, and method for determining to send a refresh command to a memory module according to a refresh rate and incrementing a postponed refresh count while the memory module is in an active mode in response to the determining to send the refresh command. The refresh command is not sent to the memory module when the postponed refresh count is incremented. A determination is made as to whether the postponed refresh count exceeds a count threshold. A refresh command is issued to the memory module to perform refresh in an active mode in response to determining that the postponed refresh count exceeds the count threshold.