Memory Controller Shift Table Read Voltage Optimization
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Solution Overview
Problem
In memory systems, erroneous data reading due to changing threshold voltages of memory cell transistors leads to increased read latency, as repeated retries with adjusted read voltages are necessary, causing deterioration in performance.
Innovation Solution
A memory system with a controller that executes read operations using a shift table to adjust read voltages, performing error correction and updating indices to optimize read operations, thereby reducing latency and improving data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the read voltage is adjusted and the read operation is retried when erroneous reading occurs, then the data reading reliability is improved, but the read latency increases
Solution Approach 1:
The system performs preliminary actions by pre-calculating and storing multiple candidate read voltages in a shift table before actual read operations. This allows the controller to quickly select appropriate read voltages without needing to retry multiple times, thereby improving reliability while minimizing latency increase.
Solution Approach 2:
The system uses feedback mechanisms where the controller monitors read operation results and uses this information to determine which read voltage to use in subsequent operations. The shift table is updated based on feedback from previous read operations, allowing the system to learn from past experiences and reduce future read latency while maintaining reliability.
2Measurement precision
If multiple read operations are performed to ensure correct data reading, then the data accuracy is improved, but the read performance deteriorates
Solution Approach 1:
The shift table is pre-populated with multiple candidate read voltages sorted in a predetermined order. This preliminary preparation allows the controller to perform read operations more efficiently by selecting from pre-organized options rather than performing multiple trial read operations, thus maintaining data accuracy while improving read performance.
Solution Approach 2:
The system dynamically adjusts the read voltage selection process based on actual read operation outcomes. The controller modifies the shift table and voltage selection strategy in real-time based on feedback, allowing the system to optimize between data accuracy and read performance for different operating conditions without requiring multiple static read operations.
Data Source
AI summary
A memory system connectable to a host, includes a non-volatile memory including a plurality of memory cell transistors and a controller configured to execute read operations on the non-volatile memory. The controller executes one or more first read operations on the non-volatile memory to obtain read data using read voltages that are determined from one of a plurality of entries stored in a shift table, and performs error correction on the read data, until the error correction is successful, and when the error correction on the read data is successful, records an index corresponding to the entry stored in the shift table that was used in obtaining the successfully error-corrected read data. The controller executes a second read operation on the non-volatile memory to obtain read data using read voltages that are determined from the entry stored in the shift table corresponding to the recorded index.