Memory Controller Dynamic SLC MLC Mode Selection

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Solution Overview

Problem

The performance of memory systems using nonvolatile memory, such as NAND flash, is influenced by the selection between Single Level Cell (SLC) and Multi Level Cell (MLC) modes, with SLC mode offering high speed but leading to rapid depletion of free blocks and compaction, while MLC mode maintains stable write speed but at lower efficiency, and determining whether data is time-continuous affects the mode selection and compaction processes.

Innovation Solution

A memory controller that dynamically selects between SLC and MLC modes based on whether the data is time-continuous, using threshold values to judge the number of free blocks and write command intervals to determine the optimal mode for writing and compaction, thereby stabilizing write speed and preventing compaction during writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If SLC-mode is used for data writing, then write speed is improved, but the number of free blocks rapidly decreases leading to compaction

Engineering Contradiction:
Improvewrite speedVSAvoidnumber of free blocks
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The system dynamically switches between SLC-mode and MLC-mode based on the number of free blocks and write command intervals. When free blocks are sufficient, SLC-mode is used for high speed writing. When free blocks become scarce, the system transitions to MLC-mode to prevent compaction, thus adapting the writing mode to current system conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the writing mode parameter (SLC/MLC) based on monitored system parameters (number of free blocks, write command interval). This parameter switching allows the system to optimize between speed and free block preservation depending on the current state

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If MLC-mode is used for data writing, then the number of free blocks is maintained, but write speed decreases

Engineering Contradiction:
Improvenumber of free blocksVSAvoidwrite speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system dynamically selects between MLC-mode and SLC-mode based on real-time monitoring of free block counts and write command intervals. MLC-mode is activated when free blocks are scarce to maintain supply, while SLC-mode is used when free blocks are abundant to maximize write speed

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The writing mode parameter is changed based on system state: MLC-mode is selected when free block count falls below threshold or write commands are frequent, while SLC-mode is selected when free blocks are sufficient and write commands are spaced out

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If compaction is performed during writing, then free blocks are recovered, but write speed decreases due to compaction overhead

Engineering Contradiction:
Improvefree blocksVSAvoidwrite speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system performs preliminary monitoring of free block counts and write command intervals to predict when compaction will be needed. By proactively switching to MLC-mode before free blocks are depleted, the system avoids the need for disruptive compaction operations during active writing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention converts the potential harm of free block depletion into a benefit by using MLC-mode as a preventive measure. The slower MLC-mode is framed as a protective mechanism that maintains free block supply, allowing the system to avoid the greater performance penalty of compaction

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS8990458B2Controller, semiconductor storage device and method of controlling data writing
Publication Date: 2015.03.24 KIOXIA CORP
  • US8990458B2 patent drawing
  • US8990458B2 patent drawing
  • US8990458B2 patent drawing

AI summary

According to one embodiment, a memory controller includes a mode selection part that selects one of a MLC-mode and a SLC-mode, after a write command is decoded by a command decode part, and a write part that executes a data writing to a storage memory by using one of the MLC-mode and the SLC-mode selected by the mode selection part. The mode selection part is configured to check whether a first data wrote from a host to a buffer memory is a time-continuous data that is wrote continuously during a predetermined period, execute the data writing of a second data from the buffer memory to the storage memory in the MLC-mode, when the first data is the time-continuous data, and execute the data writing of the second data from the buffer memory to the storage memory in the SLC-mode, when the first data is not the time-continuous data.