Memory Controller Adaptive Status Read Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory systems face challenges in achieving improved operation speed and reduced power consumption, particularly due to the increased power consumption and access time associated with repetitive status read operations during program operations on lower and upper pages.
Innovation Solution
A method and system that differentiate waiting times for status read operations based on whether the address corresponds to a lower or upper page, with a shorter waiting time for lower page operations and a longer waiting time for upper page operations, allowing for efficient status read operations after these waiting periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If status read operations are performed frequently to monitor program operation completion, then reliability of program completion detection is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the waiting time flexible and adaptive based on the page type. Instead of using a fixed waiting time for all program operations, the system dynamically adjusts the waiting time before status read operations based on whether the operation targets a lower page or upper page, optimizing the balance between reliable detection and power consumption.
Solution Approach 2:
The patent changes the time parameter of status read operations based on the program operation type. By setting different waiting times (first waiting time for lower pages, second waiting time for upper pages), the system optimizes power consumption while maintaining reliable program completion detection for each page type.
2Ease of operation
If status read operations are performed with uniform waiting time for all pages, then ease of operation is improved, but productivity decreases due to suboptimal timing
Solution Approach 1:
The patent applies local quality by differentiating the waiting time parameter based on the specific page type being accessed. Lower pages receive a first waiting time while upper pages receive a second waiting time, optimizing the status read operation timing for each local context rather than applying a uniform approach to all pages.
3Reliability
If waiting time for upper page program operations is extended to ensure completion, then reliability of data integrity is improved, but loss of time increases
Solution Approach 1:
The patent changes the waiting time parameter based on the program operation target. By setting an appropriate second waiting time for upper page operations that is longer than the first waiting time for lower pages, the system ensures data integrity for upper pages while minimizing the time loss compared to using a uniformly extended waiting time for all operations.
Data Source
AI summary
A method of operating a controller includes, determining whether an address corresponding to a program operation indicates a lower page or an upper page; waiting for a first waiting time for the program operation to the lower page when the address indicates the lower page; waiting for a second waiting time for the program operation to the upper page when the address indicates the upper page, wherein the second waiting time is longer than the first waiting time; and performing a status read operation on the semiconductor memory device after one of the first waiting time or the second waiting time.