Memory Controller Threshold Voltage Estimation for NAND Flash
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Solution Overview
Problem
The reliability of NAND flash memories, particularly in three-dimensional flash memory structures, is compromised due to cell-to-cell interference and data retention issues, where threshold voltages are affected by adjacent memory cells, leading to errors in data reading and retention.
Innovation Solution
A memory controller with a reading unit that detects and estimates threshold voltages of individual memory cells and adjacent cells, using a threshold-voltage variation model to accurately reproduce user data by accounting for Poole-Frenkel emission, thermionic emission, and cell-to-cell interference, thereby correcting errors and improving data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a uniform cross coupling coefficient is used for error correction, then the error correction process is simple, but the error rate cannot be sufficiently suppressed due to variations in threshold voltages across different bits
Solution Approach 1:
The patent applies local quality by transitioning from a uniform cross coupling coefficient to bit-specific cross coupling coefficients. Each bit position is assigned its own coefficient based on its specific threshold voltage characteristics and interference patterns, allowing the error correction to be tailored to local conditions rather than applying a one-size-fits-all approach.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the cross coupling coefficient based on detected threshold voltages and interference patterns. Instead of using a fixed uniform coefficient, the system calculates and applies different coefficients for different bit positions, adapting the error correction parameters to the actual physical conditions of each memory cell.
2Quantity of substance
If the distance between memory cells is reduced to increase storage density, then storage capacity improves, but cell-to-cell interference increases affecting threshold voltage reliability
Solution Approach 1:
The patent implements feedback by detecting the actual threshold voltages of memory cells and using this information to calculate appropriate cross coupling coefficients. The system continuously monitors the interference effects and adjusts the error correction parameters accordingly, creating a closed-loop system that compensates for the increased interference caused by reduced cell spacing.
Solution Approach 2:
The patent introduces cross coupling coefficients as an intermediary mechanism that mediates between the physical interference caused by adjacent cells and the logical data storage function. These coefficients act as a mathematical intermediary that models and compensates for the interference effects, allowing the system to maintain reliability despite the physical proximity of memory cells.
3Quantity of substance
If three-dimensional flash memory structure is used to improve storage density, then storage capacity increases, but data retention capability deteriorates due to threshold voltage deviation over time
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing cross coupling coefficients for different bit positions based on expected interference patterns. Before actual data reading occurs, the system has already prepared the appropriate correction parameters based on threshold voltage measurements, enabling faster and more accurate error correction during data retrieval operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses errors and enhances data retention by accurately estimating and correcting threshold voltages, improving the reliability of NAND flash memory devices.
Implementation Method 1
detect first threshold voltage as a threshold voltage at a time of reading of the read-target memory cell, and a second threshold voltage as a threshold voltage at a time of reading of at least one of adjacent memory cells
Implementation Method 2
accounting for Poole-Frenkel emission, thermionic emission, and cell-to-cell interference
Implementation Method 3
accounting for Poole-Frenkel emission, thermionic emission, and cell-to-cell interference
Data Source
AI summary
According to one embodiment, a memory controller includes one or more processors configured to function as a writing unit and a reading unit. The writing unit writes data as threshold voltages of individual memory cells. The reading unit reads the written data by detecting threshold voltages of the individual memory cells. The reading unit includes a selecting unit, a detecting unit, and an estimating unit. The selecting unit selects a read-target memory cell. The detecting unit detects a first threshold voltage at a time of reading of the read-target memory cell, and a second threshold voltage at a time of reading of at least one of adjacent memory cells that are adjacent to the read-target memory cell. The estimating unit estimates a third threshold voltage as a threshold voltage at a time of writing in the read-target memory cell based on the first threshold voltage and the second threshold voltage.