Memory Controller Voltage Parameter Read Level Adjustment
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Solution Overview
Problem
Memory devices face increased bit error rates due to temporal voltage shift caused by slow charge loss, which affects the accuracy of read operations over time.
Innovation Solution
A memory sub-system controller determines read level values by measuring voltage distribution parameters for each block, using a mapping table to identify suitable read levels that mitigate temporal voltage shift, allowing for efficient read operations by storing distribution voltages in metadata and retrieving them as needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional fixed read levels are used, then device complexity is reduced, but bit error rate increases due to temporal voltage shift
Solution Approach 1:
The system performs preliminary calibration to determine voltage distribution parameters (such as mean and standard deviation) for each block before actual read operations. These parameters are stored and used to dynamically adjust read levels during operation, eliminating the need for complex real-time voltage distribution analysis during reads while maintaining high reliability
Solution Approach 2:
The patent changes the approach from using fixed read levels to dynamically adjusting read levels based on voltage distribution parameters. By calculating read levels as functions of block-specific parameters (mean voltage, standard deviation) and temporal voltage shift characteristics, the system adapts to changing voltage distributions over time without requiring complex real-time measurements
2Measurement precision
If voltage distribution parameters are measured for each read operation, then read level accuracy is improved, but operation speed decreases
Solution Approach 1:
Voltage distribution parameters are determined in advance during calibration phases or block initialization, not during every read operation. The system stores these pre-computed parameters and uses them to quickly determine read levels during actual read operations, achieving both high accuracy and fast read speeds
Solution Approach 2:
Instead of measuring voltage distributions directly during read operations, the system uses stored copies of voltage distribution parameters (mean, standard deviation) that were previously determined. These parameter copies enable rapid read level calculation without repeating complex voltage measurements
3Reliability
If dynamic read level adjustment is implemented, then temporal voltage shift impact is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent transforms the complex problem of tracking full voltage distributions into a simpler parameter-based approach. By characterizing voltage distributions through a few key parameters (mean, standard deviation) and using these to compute read levels, the system achieves dynamic adaptation with manageable complexity that can be implemented through standard memory controller logic
Solution Approach 2:
The system introduces voltage distribution parameters as intermediary quantities that bridge the gap between physical voltage shifts and read level adjustments. These parameters serve as mediators that simplify the control logic, allowing the system to respond to temporal voltage shift without requiring complex real-time voltage measurements or full distribution analysis
Data Source
AI summary
A method can include receiving a request to read data from a block of a memory device coupled with a processing device, determining, using a data structure mapping block identifiers to corresponding voltage distribution parameter values, a voltage distribution parameter value associated with the block of the memory device, determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block, and reading, using the determined set of read levels, data from the block of the memory device.