Current Detection Circuit for Non-Volatile Memory Power Control

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Solution Overview

Problem

Semiconductor memory devices, particularly non-volatile memory, consume high current levels, leading to inefficient battery usage and potential overheating in mobile devices.

Innovation Solution

A current detection circuit is connected to the power input of the memory system to monitor real-time current consumption and adjust memory operation parameters on-the-fly to reduce current draw when it exceeds a reference level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If non-volatile memory operates at higher current levels, then memory operation speed and performance are improved, but battery efficiency deteriorates and overheating risk increases

Engineering Contradiction:
Improvememory operation speedVSAvoidbattery efficiency
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic current adjustment by monitoring real-time current consumption and adapting memory operation parameters accordingly. The system transitions from static operating parameters to dynamic adjustment, modifying memory access patterns, voltage levels, and operation timing based on detected current conditions to optimize both performance and power efficiency

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where a current detection circuit continuously monitors current consumption and provides signals to control logic that adjusts memory operation parameters. This closed-loop feedback system enables real-time optimization of memory operations based on actual power consumption conditions, balancing speed and battery efficiency

Inventive Principle:
Principle #23Feedback

2Speed

If non-volatile memory operates at higher current levels, then memory operation speed is improved, but device temperature increases causing overheating

Engineering Contradiction:
Improvememory operation speedVSAvoiddevice temperature
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The system dynamically adjusts memory operation parameters based on real-time current detection, modifying operating conditions to prevent excessive heat generation. By adapting voltage levels, access patterns, and operation timing dynamically, the system maintains performance while controlling thermal effects

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The current detection circuit provides feedback on power consumption that correlates with heat generation. The control logic uses this feedback to adjust memory operations in real-time, preventing temperature from rising to harmful levels while maintaining acceptable performance

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If memory operation parameters are adjusted to reduce current draw, then battery efficiency is improved, but memory operation speed may deteriorate

Engineering Contradiction:
Improvebattery efficiencyVSAvoidmemory operation speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The system employs dynamic parameter adjustment that adapts memory operation characteristics based on detected current conditions. By continuously monitoring and adjusting voltage, timing, and access patterns dynamically, the system optimizes the balance between power consumption and operation speed rather than using fixed conservative parameters

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes multiple memory operation parameters including voltage levels, timing sequences, and access patterns to reduce current draw. These parameter modifications are implemented dynamically based on detection results, allowing the system to maintain performance while reducing power consumption through optimized operational characteristics

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12475959B2Non-volatile memory with current detection circuit
Publication Date: 2025.11.18 SANDISK TECHNOLOGIES LLC
  • US12475959B2 patent drawing
  • US12475959B2 patent drawing
  • US12475959B2 patent drawing

AI summary

A memory system implemented on one or more die includes a power input line for the one or more die, a current detection circuit connected to the power input line such that the current detection circuit is configured to indicate whether current at the power input is greater than a reference current, and a control circuit connected to the power input line and the current detection circuit. The control circuit is also connected to a non-volatile memory structure comprising a plurality of non-volatile memory cells. The control circuit is configured to sense data from the non-volatile memory structure including lowering a voltage used during the sensing in response to the current detection circuit indicating that current at the power input line is greater than the reference current.