Memory Interface Cycle Calculation for Aligned Data Transfers
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Solution Overview
Problem
Existing techniques for determining the minimum number of memory access cycles required to transfer a specified amount of data to or from a memory are not entirely satisfactory, as they do not effectively account for variations in data quantity and address alignment with memory boundaries.
Innovation Solution
A method and circuit that calculate the minimum number of memory access cycles by using logarithmic functions and parameters such as memory burst length and pin count, incorporating pre- and post-masking to optimize data transfer across memory interfaces, particularly in field programmable gate arrays (FPGAs).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing techniques for determining memory access cycles are used, then the calculation method is simple, but the accuracy in accounting for variations in data quantity and address alignment is insufficient
Solution Approach 1:
The patent changes the calculation parameters from simple division to logarithmic functions. Specifically, it uses log2(D) where D is the data quantity, and incorporates address alignment parameters (A mod B) to accurately calculate memory access cycles. This parameter transformation enables precise accounting for variations in data quantity and address alignment while maintaining computational feasibility through standardized logarithmic operations.
2Productivity
If the number of memory access cycles is reduced, then data transfer efficiency is improved, but the complexity of optimizing for variations in data quantity and address alignment increases
Solution Approach 1:
The patent performs preliminary calculations of logarithmic values and address alignment adjustments before the actual data transfer operation. By pre-computing log2(D) and determining the optimal number of memory access cycles based on address alignment (A mod B), the system prepares the transfer parameters in advance, enabling efficient execution without runtime optimization complexity.
Solution Approach 2:
The calculation method automatically adapts to different data quantities and address alignments without external intervention. The logarithmic function and modular arithmetic operations self-adjust based on input parameters, eliminating the need for manual optimization or complex control logic while achieving reduced memory access cycles.
3Measurement precision
If logarithmic functions are used to calculate memory access cycles, then the minimum number of cycles is accurately determined, but the computational complexity increases
Solution Approach 1:
The patent replaces complex iterative or trial-and-error calculation methods with direct logarithmic function evaluation. Instead of mechanically testing different cycle counts, the system uses the mathematical relationship M = log2(D) to directly determine the minimum memory access cycles, significantly reducing computational difficulty while maintaining high precision.
Data Source
AI summary
A technique applicable during the transfer of data to and from a memory involves: operating a memory interface using memory access cycles that each transfer a quantity of data D across the memory interface; receiving a request to transfer a quantity of data Q across the memory interface; and calculating a value M as a function of a plurality of parameters, M being a minimum number of the memory access cycles needed to carry out the transfer of the quantity of data Q across the memory interface, wherein the calculating includes determining a logarithm of one of the parameters, and then determining the value M as a function of the logarithm.