Memory Data Preservation During Hard Post Package Repair

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory devices face challenges in preserving data during hard post package repair (hPPR) operations, particularly in scenarios where power cycling is not feasible, leading to potential data loss and inefficiencies in data retention.

Innovation Solution

A method and system for data preservation during hPPR that involves reading data from unrepaired memory locations and writing it to redundant memory locations within the same chip, allowing data to be retained without external caching or power cycling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hard post package repair (hPPR) operations are performed on memory devices, then defective memory cells can be repaired, but data stored in the memory device may be lost and power cycling is required

Engineering Contradiction:
Improvememory repair capabilityVSAvoiddata loss during repair
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The system performs preliminary data preservation actions before the hPPR operation by detecting when an hPPR command is received and automatically copying data from the memory location to be repaired to a safe location, ensuring data is protected before the repair process begins

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The command decoder acts as an intermediary between the hPPR operation and the data storage system, intercepting the repair command and coordinating data preservation operations through sense amplifiers and memory controllers to prevent data loss during the repair process

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If hard post package repair (hPPR) operations are performed on memory devices, then defective memory cells can be repaired, but power cycling is required which causes operational interruption

Engineering Contradiction:
Improvememory repair capabilityVSAvoidoperational continuity
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The system performs preliminary data preservation actions before the hPPR operation by detecting when an hPPR command is received and automatically copying data from the memory location to be repaired to a safe location, ensuring data is protected before the repair process begins

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the operational parameters of the memory device by enabling data preservation mode through the command decoder, which modifies how data is handled during the repair process to eliminate the need for power cycling

Inventive Principle:
Principle #35Parameter changes

3Loss of information

If data is preserved during hPPR operations by moving data to redundant locations, then data loss is prevented, but computing overhead increases

Engineering Contradiction:
Improvedata preservationVSAvoidcomputing overhead
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The memory device performs self-service data preservation by using its own internal resources (sense amplifiers, memory controllers, and redundant memory locations) to copy and protect data during hPPR operations, eliminating the need for external caching systems or additional processing equipment

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250372193A1Post package repair data preservation systems and methods
Publication Date: 2025.12.04 MICRON TECHNOLOGY INC
  • US20250372193A1 patent drawing
  • US20250372193A1 patent drawing
  • US20250372193A1 patent drawing

AI summary

A memory device may sometimes undergo post package repair. Systems and methods described herein may help preserve data of the memory device as part of the post package repair operations. Systems and methods described herein may enable receiving a post package repair command and an indication of a target memory address, performing an on-chip data preservation on a target portion of memory based on the target memory address, and performing post package repair on the target portion of memory based on the target memory address.