Semiconductor Memory Data Transmission Circuit Timing Synchronization

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Solution Overview

Problem

In semiconductor memory devices, particularly in mobile systems, there are challenges in synchronizing data and column enable signals due to the distance between the edge regions, leading to difficulties in adjusting signal timings based on the position of the column control portion.

Innovation Solution

A data transmission control circuit is introduced, comprising pulse extraction and latch portions to generate and synchronize pulses from data strobe clock and column enable signals, ensuring that data and column enable signals are transmitted synchronously to the column control portion, regardless of its position, by using a first and second pulse extraction portion and latch portions to manage internal data and output pulses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the column control portion is disposed closer to the first edge region, then the column enable signal transmission path is shortened, but the data transmission path becomes longer causing timing asynchronization

Engineering Contradiction:

Improvesignal transmission speedVSAvoidsignal timing synchronization

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

A delay circuit is introduced as an intermediary component to adjust the timing of the column enable signal. This delay circuit receives the column enable signal from the first edge region and outputs a delayed version to the column control portion, acting as a mediator that balances the timing between the column enable signal and the data signal that travels through a longer path.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the timing parameter of the column enable signal by introducing a controllable delay. The delay circuit adjusts the propagation time of the column enable signal to match the longer data transmission path, thereby synchronizing the arrival times of both signals at the column control portion despite the asymmetric path lengths.

Inventive Principle:

Principle #35Parameter changes

2Speed

If the column control portion is disposed closer to the second edge region, then the data transmission path is shortened, but the column enable signal transmission path becomes longer causing timing asynchronization

Engineering Contradiction:

Improvedata transmission speedVSAvoidsignal timing synchronization

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

The delay circuit serves as an intermediary that receives the column enable signal and introduces a controlled delay before forwarding it to the column control portion. This intermediary component compensates for the longer path of the column enable signal, ensuring that both the data signal and column enable signal arrive at the column control portion simultaneously.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention modifies the timing parameter of the column enable signal by applying a delay that matches the additional path length. This parameter adjustment ensures that the column enable signal and data signal are synchronized in time, resolving the timing asynchronization caused by the asymmetric placement of the column control portion.

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If timing adjustment is made based on column control portion position, then signal synchronization can be achieved, but device complexity and adjustment difficulty increase

Engineering Contradiction:

Improvesignal timing synchronizationVSAvoidtiming adjustment mechanism

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The timing adjustment function is extracted from the column control portion and implemented as a separate, dedicated delay circuit. This extraction simplifies the column control portion's design while providing precise timing control through a specialized component that can be independently optimized and adjusted.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The timing adjustment mechanism is segmented into a distinct delay circuit module that operates independently from the column control logic. This segmentation allows for easier adjustment and testing of timing parameters without affecting the overall control portion functionality, thereby reducing the complexity of integrated timing adjustment.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS8699276B2Data transmission circuits and semiconductor memory devices including the same

Publication Date: 2014.04.15 MIMIRIP LLC

AI summary

A semiconductor memory device including a first edge region for receiving a write command through a first pad portion to generate a column enable signal used in creation of a column selection signal; a second edge region including a data transmission control circuit capable of receiving an input data and a data strobe signal through a second pad portion and capable of receiving an address signal from the first pad portion to generate and output transmission data, the data transmission control circuit capable of outputting the column enable signal transmitted from the first edge region; and a core region including a column control portion that is capable of processing the transmission data in response to the column enable signal outputted from the second edge region to send the transmission data to bit lines electrically connected to memory cells.