Semiconductor Memory Device Deep-Power-Down Leakage Control

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Solution Overview

Problem

Conventional semiconductor memory devices experience unwanted leakage current during deep-power-down mode, leading to increased power consumption due to the generation of initialization signals, which is undesirable when retaining data is not necessary.

Innovation Solution

A semiconductor memory device is designed to not generate the first initialization signal during deep-power-down mode, using a first initializing circuit that generates the signal only during power-up and exit from deep-power-down mode, incorporating a pre-initialization signal-supply unit, buffer unit, and discharge unit to manage voltage levels and control signals effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the first initialization signal is generated during deep-power-down mode, then the internal circuit is initialized, but leakage current increases and power consumption increases

Engineering Contradiction:

Improveinitialization of internal circuitVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The initialization signal is generated in advance during power-up operation before the memory device enters deep-power-down mode. The signal voltage is raised to a predetermined level and then fixed at a low level, preparing the internal circuit for low-power operation without generating the signal during DPD mode itself.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The generation of the first initialization signal is made dynamic based on the operating mode. The signal is generated during power-up operation and exit from deep-power-down mode, but suppressed during deep-power-down mode entry. This dynamic control adapts the initialization behavior to the current operational state, preventing unnecessary signal generation that would cause leakage current.

Inventive Principle:

Principle #15Dynamics

2Reliability

If the first initialization signal is generated during deep-power-down mode, then the latch circuit logic level is set, but unwanted leakage current is generated

Engineering Contradiction:

Improvelatch circuit initializationVSAvoidleakage current

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The latch circuit is initialized in advance during power-up operation before entering deep-power-down mode. The first initialization signal raises the latch circuit logic level to a predetermined level and then fixes it at a low level, ensuring proper initialization without generating the signal during DPD mode when it would cause leakage current.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent converts the potential harm of unnecessary initialization signals during deep-power-down mode into a benefit by implementing conditional generation logic. The initialization signal is only generated when actually needed (power-up and exit from DPD), and suppressed when it would cause harm (entry into DPD), thus eliminating leakage current while maintaining proper circuit initialization.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Loss of energy

If the initialization signal voltage is fixed at low level after reaching predetermined level, then power consumption is reduced, but the signal must be regenerated when exiting deep-power-down mode

Engineering Contradiction:

Improvepower consumptionVSAvoidsignal generation control

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The initialization signal generation is made dynamic and conditional based on operating mode transitions. The signal is generated during power-up operation and exit from deep-power-down mode, but not during deep-power-down mode. This dynamic approach reduces power consumption by avoiding unnecessary signal generation while maintaining the ability to initialize the circuit when needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system uses feedback from mode detection to control signal generation. The initialization signal is generated in response to detecting power-up operation or exit from deep-power-down mode, and suppressed when detecting entry into deep-power-down mode. This feedback mechanism ensures proper initialization timing while minimizing power consumption and managing device complexity through intelligent control.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS7800972B2Method of operating semiconductor memory device, semiconductor memory device and portable media system including the same

Publication Date: 2010.09.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of operating a semiconductor memory device may include initializing a first internal circuit in response to a first initialization signal based on an internal power voltage. The first initialization signal may be generated if the semiconductor memory device performs a power-up operation. The semiconductor memory device may enter a deep-power-down (DPD) mode without generating the first initialization signal. The first initialization signal may be generated if the semiconductor memory device exits the DPD mode.