Semiconductor Memory Device With Deposition-Inhibiting Layer

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Solution Overview

Problem

The challenge in semiconductor memory devices is to enhance manufacturing ease and reliability while maintaining data retention characteristics, particularly in vertically stacked NAND flash memory where downscaling of planar structures is nearing its limits and existing technologies face challenges in manufacturing and reliability.

Innovation Solution

The solution involves a semiconductor memory device configuration with a specific structure including silicon pillars, conductive films, and insulating films, along with a manufacturing method that alternately stacks inter-layer insulating films and sacrificial films, forms trenches and recesses, and uses deposition-inhibiting layers to selectively form conductive films, ensuring high data retention and easy manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If vertically stacked memory cell structure is adopted to increase integration, then storage capacity is improved, but manufacturing complexity and reliability challenges increase

Engineering Contradiction:
Improvestorage capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory device is segmented into multiple stacked memory cell layers, each containing separated floating gate electrodes and insulating films. This segmentation allows independent formation and control of each cell layer, simplifying the manufacturing process while achieving high storage capacity through vertical stacking.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the device have specialized structures: floating gate electrodes in charge retention regions, insulating films in specific positions to suppress electron injection, and conductive films in interconnect regions. This local differentiation optimizes each region's function while maintaining overall manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If conventional stacked type memory device is manufactured, then integration is improved, but ease of manufacture deteriorates

Engineering Contradiction:
ImproveintegrationVSAvoidease of manufacture
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

Inter-layer insulating films and sacrificial films are alternately stacked in advance before forming trenches and recesses. This preliminary stacking establishes a structured foundation that guides subsequent processing steps, making the manufacturing process more systematic and easier to control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Sacrificial films serve as intermediary structures during manufacturing, enabling the formation of complex three-dimensional structures through controlled removal. These films facilitate the creation of trenches and recesses without requiring direct complex patterning, simplifying the overall manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If conventional stacked type memory device is manufactured, then integration is improved, but reliability deteriorates

Engineering Contradiction:
ImproveintegrationVSAvoidreliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The structure converts potentially harmful electron injection into the floating gate electrode into a controlled process by positioning insulating films strategically. These films suppress unwanted electron injection while allowing necessary charge storage, transforming a reliability issue into a controlled functional feature.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

Insulating films are positioned in advance in regions where electron injection might occur, providing protective cushioning before electrons can cause damage. This preventive structure maintains data retention characteristics by blocking harmful electron paths while preserving necessary charge storage functionality.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses electron injection into the floating gate electrode, maintaining high data retention characteristics and simplifying the manufacturing process, thereby improving the reliability and ease of production of semiconductor memory devices.

Implementation Method 1

forming a deposition-inhibiting layer in a region of an inner surface of the second recess and the slit other than an exposed surface of the second insulating film; forming a conductive film on the exposed surface of the second insulating film by performing vapor deposition

Methodology Applied
Scientific EffectDeposition inhibition: Deposition (physical)

Implementation Method 2

forming a conductive film on the exposed surface of the second insulating film by performing vapor deposition using a source gas via the slit and the second recess

Methodology Applied
Scientific EffectVapor deposition: Physical Vapour Deposition

Data Source

PatentUS11257832B2Semiconductor memory device and method for manufacturing same
Publication Date: 2022.02.22 KIOXIA CORP
  • US11257832B2 patent drawing
  • US11257832B2 patent drawing
  • US11257832B2 patent drawing

AI summary

A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, a second insulating film provided between the second electrode and the first insulating film and on two first-direction sides of the second electrode, a third insulating film provided between the second electrode and the semiconductor pillar, and a conductive film provided inside a region interposed between the first insulating film and the second insulating film.