Semiconductor Memory Device Detrap Voltage Program Loop
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Solution Overview
Problem
Semiconductor memory devices face challenges in ensuring the reliability of program operations due to trapped electrons that can lead to threshold voltage degradation, particularly in three-dimensional memory structures where electrons are not fully trapped, causing instability in memory cell programming.
Innovation Solution
A semiconductor memory device with a peripheral circuit that performs a program loop including a program section, a detrap section, and a verify section, where a detrap voltage is applied to increase the channel potential of the cell string, allowing holes to be injected into the tunnel insulating layer to remove trapped electrons, thereby stabilizing the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a program voltage is applied to program a selected memory cell in a three-dimensional memory structure, then the memory cell can be programmed, but trapped electrons cause threshold voltage degradation and programming instability
Solution Approach 1:
The patent applies periodic action by implementing a program loop that alternates between program sections (applying program voltage to inject electrons) and detrap sections (applying detrap voltage to remove trapped electrons). This periodic cycling continues until the desired threshold voltage is achieved, preventing electron trapping-induced instability while maintaining reliable programming.
Solution Approach 2:
The patent converts the harmful effect of trapped electrons (which cause threshold voltage degradation) into a beneficial process by deliberately applying detrap voltages during the detrap section. This intentionally induces controlled electron detrapping to prevent uncontrolled trapping damage, thereby improving program operation reliability and threshold voltage stability.
2Quantity of substance
If electrons are trapped in the tunnel insulating layer during programming, then charge storage is achieved, but threshold voltage drops occur causing programming instability
Solution Approach 1:
The patent implements feedback by continuously monitoring the threshold voltage of the memory cell during the program loop. After each program and detrap cycle, the verify operation checks whether the threshold voltage has reached the target value. Based on this feedback, the control circuit determines whether to continue the program loop or terminate programming, thereby maintaining threshold voltage stability while achieving the required charge storage.
Solution Approach 2:
The patent uses periodic action by repeatedly cycling through program sections (electron injection) and detrap sections (electron removal) in controlled intervals. This periodic process prevents excessive electron accumulation in the tunnel insulating layer, maintaining a stable threshold voltage while still achieving sufficient charge storage for reliable programming.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enhances the reliability of program operations by effectively removing shallowly trapped electrons, minimizing threshold voltage drops, and improving the overall stability of the semiconductor memory device.
Implementation Method 1
supply a detrap voltage to the cell string during the detrap section... allowing holes to be injected into the tunnel insulating layer to remove trapped electrons
Data Source
AI summary
A semiconductor memory device includes a cell string and a peripheral circuit. The cell string includes a plurality of memory cells coupled between a common source line and a bit line. The peripheral circuit controls a voltage supplied to the cell string to program a selected memory cell of the cell string by performing a program loop including a program section, a detrap section, and a verify section. Also, the peripheral circuit is configured to supply a program voltage to a word line coupled to the selected memory cell among the plurality of memory cells during the program section. The peripheral circuit further supplies a detrap voltage to the cell string during the detrap section and supplies a verify voltage to the word line during the verify section.