Memory Device Resistance Biasing to Reduce Bitline Leakage
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Solution Overview
Problem
Existing resistance-based RAM technologies experience significant bitline leakage during read operations, especially at high temperatures, leading to reduced power supply to selected cells and deteriorated performance.
Innovation Solution
Incorporation of a resistance device on the select line to bias unselected word lines to a negative voltage, reducing power leakage by using a MOS transistor and variable resistor configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a resistance device is added to bias unselected word lines to negative voltage, then bitline leakage is reduced, but device complexity increases
Solution Approach 1:
A resistance device is introduced as an intermediary component between the bitline and ground. This resistance device acts as a mediator that actively biases unselected word lines to negative voltage during read operations, thereby reducing bitline leakage current without requiring complex charge pump circuits.
2Loss of energy
If traditional charge pump solutions are used to reduce bitline leakage, then leakage is reduced, but design complexity and costs increase
Solution Approach 1:
The patent replaces complex, expensive charge pump circuits with a simple resistance device that can be easily integrated into the memory array. This resistance device provides the necessary negative bias function at minimal cost and complexity, effectively solving the bitline leakage problem without the overhead of traditional charge pump solutions.
3Quantity of substance
If scaling to 10 nanometer node or under is pursued, then memory density is improved, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent introduces a resistance device that changes the voltage parameter of unselected word lines to negative values during read operations. This parameter change effectively reduces bitline leakage at scaled nodes (10nm and below) without requiring fundamental changes to the manufacturing process, thereby maintaining ease of manufacture while achieving high memory density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly reduces bitline leakage, simplifies design complexity, and lowers costs compared to traditional charge pump solutions, while maintaining or improving read operation performance.
Implementation Method 1
The resistance device has a first terminal and a second terminal. The first terminal of the resistance device is coupled to each of the plurality of select lines, and the second terminal of the resistance device is coupled to ground. The resistance device is structured to bias, in the read operation, word lines of unselected memory cells in a column of a selected memory cell to a determined negative voltage.
Data Source
AI summary
A memory device includes a plurality of select lines, a plurality of word lines, an array of memory cells, a bitline, and a resistance device. The array of memory cells includes multiple rows and multiple columns. The bitline is structured to receive a current in a read operation, causing a value stored in a selected memory cell to be readable when a select line and a word line that interest the selected memory cell are selected. The resistance device has a first terminal and a second terminal. The first terminal is coupled to the select lines, and the second terminal is coupled to ground. The resistance device is structured to bias, in the read operation, word lines of unselected memory cells in a column of a selected memory cell to a determined negative voltage.