Memory Device Internal Command Generator Shared Channel
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Solution Overview
Problem
Semiconductor memory devices face inefficiencies in channel usage and increased power consumption due to the need for external memory controllers to manage data operations across multiple memory cell groups, leading to reduced performance and higher energy consumption.
Innovation Solution
A memory device architecture that includes a buffer die with an internal command generator and stacked core dies with through-silicon vias (TSVs) to enable a common internal processing channel shared among memory cell groups, allowing for internal data processing operations without external intervention, thereby optimizing data transmission and reducing reliance on independent channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If independent channels are used for each memory cell group, then data transmission reliability is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent merges multiple independent channels into a shared common channel that serves multiple memory cell groups. Instead of having separate dedicated channels for each memory cell group, a single common channel is implemented that can be dynamically allocated to different memory cell groups based on operational needs, thereby reducing device complexity while maintaining data transmission reliability through proper channel management and arbitration mechanisms.
Solution Approach 2:
The common channel is designed with multi-functionality to handle various data transmission tasks across different memory cell groups. The channel can be dynamically configured and allocated to serve different memory cell groups for different operations, making it a universal communication pathway that replaces multiple specialized channels, thus reducing overall system complexity while preserving reliable data transmission capabilities.
2Ease of operation
If external memory controller manages data operations, then memory device operability is improved, but channel bandwidth occupancy and power consumption increase
Solution Approach 1:
The memory device is equipped with an internal command generator that enables self-service functionality. Instead of requiring the external memory controller to manage all data operations, the internal command generator autonomously generates and processes commands for internal memory operations. This self-service capability allows the memory device to handle certain operations independently, reducing the burden on external controllers and improving channel bandwidth efficiency by eliminating unnecessary external communications.
3Ease of operation
If external memory controller manages data operations, then memory device operability is improved, but power consumption increases
Solution Approach 1:
The internal command generator enables the memory device to perform self-service operations, reducing the need for continuous external controller intervention. By handling internal command generation and processing autonomously, the memory device minimizes communication overhead with external controllers, thereby reducing power consumption associated with external signal transmissions and controller operations while maintaining ease of operation.
4Productivity
If common internal processing channel is shared among memory cell groups, then productivity and energy efficiency are improved, but device complexity increases
Solution Approach 1:
The internal command generator serves as an intermediary that manages the common channel's allocation to different memory cell groups. It arbitrates channel access, configures channel parameters, and coordinates data transmission between multiple memory cell groups sharing the same channel. This intermediary mechanism simplifies channel management complexity by centralizing control logic within the memory device while enabling high-productivity shared channel operation.
Data Source
AI summary
A memory device includes a memory cell array having a plurality of memory cell groups with a corresponding plurality of independent channels, and the device and an operating method thereof perform an internal data processing operation for the memory cell groups. The memory device includes an internal command generator configured to generate one or more internal commands in order to perform an internal data processing operation in response to a reception of a command, and an internal common bus for a common internal processing channel which is disposed to be shared by the plurality of memory cell groups and configured to form a transmission path of data between the plurality of memory cell groups when the internal data processing operation is performed.


