Semiconductor Memory Device Insulated Drive Circuit Region
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Solution Overview
Problem
Current semiconductor memory devices face challenges in optimizing chip area usage and manufacturing complexity due to the placement and design of drive transistors and conductive layers, which affects the efficiency and scalability of memory cell arrays.
Innovation Solution
The semiconductor memory device incorporates a drive circuit region insulated from memory and contact regions, with conductive layers forming vertical TFT structures, allowing for reduced chip area occupation and simplified manufacturing processes by sharing processes with memory structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If drive transistors are placed in the memory region alongside memory cells, then manufacturing process is simplified by sharing processes, but chip area is increased and manufacturing precision requirements are heightened
Solution Approach 1:
The patent divides the semiconductor device into distinct functional regions: a memory cell array region and a drive circuit region. The drive transistors are segregated into the drive circuit region, which is insulated from the memory region by an insulating layer. This spatial segmentation allows each region to be optimized independently while sharing common manufacturing processes for conductive layers and insulating films, thus reducing chip area without sacrificing manufacturing simplicity.
2Ease of manufacture
If drive transistors are placed in the memory region, then manufacturing process is simplified by sharing processes, but manufacturing precision requirements are heightened due to overlapping structures
Solution Approach 1:
By segmenting the device into memory region and drive circuit region separated by an insulating layer, the patent eliminates overlapping structures between drive transistors and memory cells. This reduces the alignment precision requirements during manufacturing while still allowing shared processes for conductive layers and insulating films to be used across both regions.
Solution Approach 2:
The insulating layer acts as an intermediary barrier between the memory region and drive circuit region. This intermediary structure enables both regions to share common manufacturing processes while maintaining electrical isolation and reducing the precision requirements for aligning drive transistors with memory cell structures.
3Area of stationary object
If drive transistors are isolated in a separate drive circuit region, then chip area is reduced and manufacturing precision is relaxed, but device complexity increases due to additional insulating structures
Solution Approach 1:
The insulating layer serves multiple functions simultaneously: it provides electrical isolation between the memory region and drive circuit region, acts as a physical barrier to reduce interference, and enables both regions to share common manufacturing processes for conductive layers and insulating films. This multi-functionality reduces device complexity despite the spatial separation of drive transistors.
Data Source
AI summary
A semiconductor memory device includes a substrate, a plurality of conductive layers, a first semiconductor layer, a memory portion, and a drive circuit which drives the memory cell. The conductive layers are provided in a first region, a second region, and a third region different from the first region and the second region, and a portion positioned in the third region is insulated from a portion positioned in the first region and the second region. The drive circuit is provided in the third region, and includes a second semiconductor layer, and an insulating layer, and one end of the second semiconductor layer is connected to the conductive layers in the second region and the other end of the second semiconductor layer is connected to the substrate.