Memory Device Power Reduction via Deep Power Down Self Refresh Mode
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Solution Overview
Problem
Conventional memory devices face challenges in achieving extreme power saving while ensuring data storage, as the deep power down mode does not guarantee data preservation and the self refresh mode consumes more power than necessary.
Innovation Solution
The introduction of a deep power down self refresh (DSR) mode, which utilizes individual power switches for each memory bank and functional block, allowing for selective power management to maintain data storage with reduced power consumption, similar to the deep power down mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If deep power down mode is used to achieve extreme power saving, then power consumption is reduced to the lowest level, but data storage is not guaranteed
Solution Approach 1:
The memory device is divided into multiple independent memory banks, each with its own power switch. This segmentation allows selective power management where only specific banks maintain power for data storage while others are powered down, resolving the contradiction between power saving and data preservation by enabling partial operation rather than all-or-nothing power states
Solution Approach 2:
The system dynamically transitions between different power states (deep power down, standby power down, self refresh, and new DSR mode) based on operational requirements. The dynamic power switch control enables the system to adapt power distribution to actual data storage needs, allowing banks to be individually activated or deactivated rather than maintaining a static power state for the entire device
2Reliability
If self refresh mode is used to guarantee data storage, then data is safely maintained, but power consumption is higher than necessary
Solution Approach 1:
The invention extracts the essential function of data storage from the global self refresh operation and applies it selectively to only those memory banks that require data preservation. By taking out the power maintenance function from the entire device and applying it only to specific banks, the system eliminates unnecessary power consumption in banks that can be fully powered down, resolving the contradiction between data guarantee and power efficiency
3Use of energy by moving object
If individual power switches are implemented for each memory bank and functional block, then selective power management is enabled, but device complexity increases
Solution Approach 1:
The power switch control logic is designed to perform multiple functions: it controls power distribution to memory banks, manages functional block power states, and implements transitions between different power modes (deep power down, standby, self refresh, DSR). This multi-functional control structure reduces the need for separate control circuits for each function, thereby mitigating the complexity increase while enabling fine-grained power management
Data Source
AI summary
The disclosure is directed to a memory device and a power reduction method of the same memory device. In an aspect, the disclosure is directed to a memory device which includes not limited to a plurality of memory banks, each having a power switch, a plurality of functional blocks for reading and writing to the plurality of memory banks and include a plurality of power switches as each functional block of the plurality of function blocks has a different power switch which turns on or turns off the functional block, a mode register circuit having a plurality of mode registers which determines whether one or more of the plurality of memory banks would maintain data storage or not, and a control logic circuit for either powering on or powering off each of the plurality of memory banks and each of the plurality of the functional blocks.