Semiconductor Memory Device Pre-Charging Bit Line for Fast Read Operations

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Solution Overview

Problem

Current semiconductor memory devices face challenges in accelerating read operations due to inefficiencies in data transfer between data latch circuits, leading to increased power consumption and operation time.

Innovation Solution

The semiconductor memory device incorporates a driver to pre-charge the bit line, allowing for simultaneous discharge or charge of the data bus and data latch circuit without the need for repeated charging operations, thereby reducing the time required for data transfer and minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data transfer between data latch circuits is performed using conventional methods, then data transfer can be completed, but the transfer time is prolonged and power consumption increases

Engineering Contradiction:

Improveread operation speedVSAvoiddata transfer time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The bit line is pre-charged to a predetermined voltage level before the read operation begins. This preliminary charging action eliminates the need for repeated charging operations during data transfer between data latch circuits, thereby reducing the overall transfer time and accelerating the read operation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent combines the bit line charging function with the data transfer operation. By using the pre-charged bit line to simultaneously perform both charging and data transfer functions, the patent eliminates separate charging steps and reduces the total operation time.

Inventive Principle:

Principle #5Merging (Combining)

2Productivity

If data transfer between data latch circuits is performed using conventional methods, then data can be transferred, but power consumption increases due to repeated charging operations

Engineering Contradiction:

Improveread operation efficiencyVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent converts the potentially harmful effect of repeated charging operations (which cause high power consumption) into a beneficial pre-charging step performed once before the read operation. This transforms a continuous power-consuming process into a single preparatory action, significantly reducing overall power consumption.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11114166B2Semiconductor memory device

Publication Date: 2021.09.07 KIOXIA CORP

AI summary

According to one embodiment, a semiconductor memory device includes a bit line electrically connected to a memory cell, a first node electrically connected to the bit line, a first driver configured to increase a voltage of the first node to a first voltage, a first buffer circuit configured to store data based on the voltage of the first node, a bus electrically connected to the first buffer circuit, a first transistor electrically connected between the first node and the bus, and a second buffer circuit electrically connected to the bus. The first buffer circuit is electrically connected to an input terminal of the first driver. The first driver changes a voltage of the bus based on the data stored in the first buffer circuit.