Memory Device Precharge Voltage Application
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Solution Overview
Problem
Existing memory devices face disturbances during program operations, affecting their speed and efficiency, particularly due to capacitive coupling effects between source select lines and the source line.
Innovation Solution
A method and memory device configuration where a precharge voltage is applied to the source line and then to a first source select line connected to an adjacent source select transistor in unselected memory blocks, reducing disturbances by precharging the source line in two steps during the program operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a precharge voltage is applied only to the source line during program operation, then the circuit structure remains simple, but disturbances occur due to capacitive coupling between source select lines and source line
Solution Approach 1:
The precharge voltage application is segmented into two distinct phases: first precharging the source line, then precharging the first source select line. This segmentation allows targeted voltage application to different circuit components, reducing capacitive coupling disturbances while maintaining manageable circuit complexity through structured control
Solution Approach 2:
The first source select line is precharged in advance before the actual program operation begins. This preliminary action prepares the circuit by establishing proper voltage levels on the source select line, preventing disturbances during subsequent program operations without requiring complex real-time intervention
2Reliability
If the program operation proceeds without precharging the first source select line, then the operation speed is maintained, but disturbances affect program operation reliability
Solution Approach 1:
The precharging of the first source select line is performed as a preliminary action during the program operation sequence, specifically after the source line is precharged and before the actual programming begins. This timing ensures that the disturbance-preventing action is completed in advance, maintaining reliability without significant time penalty
Solution Approach 2:
The precharge operations are integrated into the continuous program operation flow, where the source line precharge and first source select line precharge occur sequentially as part of the overall program sequence. This continuous integration minimizes idle time and ensures that the useful action of programming proceeds without interruption after the preparatory precharge steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances program operation speed by minimizing disturbances and improving the reliability of memory device operations through controlled precharging, thereby reducing errors and increasing performance.
Implementation Method 1
disturbances during program operations, affecting their speed and efficiency, particularly due to capacitive coupling effects between source select lines and the source line
Data Source
AI summary
The present technology relates to an electronic device. According to the present technology, a method of operating a memory device including a program operation speed in which an effect of a disturbance is reduced, and including a plurality of memory blocks each including a plurality of memory cell strings each including a plurality of memory cells connected in series between a bit line and a source line, a plurality of source select transistors connected in series between the source line and the plurality of memory cells, and a plurality of drain select transistors connected in series between the bit line and the plurality of memory cells, includes applying a precharge voltage to the source line, and applying the precharge voltage to a first source select line connected to a source select transistor adjacent to the source line among source select transistors included in an unselected memory block among the plurality of memory blocks.