Semiconductor Memory Device Data Sensing Margin Enhancement
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Solution Overview
Problem
The decreasing level of power supply voltage in semiconductor memory devices reduces the data sensing margin, making it difficult to determine the data stored in memory cells.
Innovation Solution
The semiconductor memory device incorporates a reference memory cell with a separate plate voltage configuration, allowing bitlines to be precharged to a power supply voltage or ground voltage level, and uses charge sharing and capacitive coupling to enhance data sensing through a bitline sense amplifier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power supply voltage level is decreased, then power consumption is reduced, but the data sensing margin decreases
Solution Approach 1:
The patent divides the voltage reference system into two separate systems: one for precharging bitlines (to Vdd or ground) and another for the reference capacitor (with variable plate voltage). This segmentation allows independent optimization of each function, enabling full voltage swing for sensing while maintaining low power operation.
Solution Approach 2:
The patent changes the voltage parameter of the reference capacitor dynamically. The plate voltage of the reference capacitor is varied between different levels (e.g., Vdd, ground, or intermediate voltages) depending on the operation mode, allowing the system to maintain adequate sensing margin even when operating at lower power supply voltages.
2Device complexity
If the power supply voltage level is decreased, then device complexity is reduced, but data sensing reliability deteriorates
Solution Approach 1:
The patent introduces dynamic voltage control for the reference capacitor's plate voltage. The voltage is adjusted in real-time based on operational requirements, allowing the system to adapt to different sensing conditions and maintain reliability without increasing structural complexity.
Solution Approach 2:
The reference capacitor acts as an intermediary element between the bitline and the sensing amplifier. By controlling its plate voltage independently, it mediates the sensing process to ensure adequate signal margin is achieved even with reduced power supply voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the data sensing margin while minimizing additional hardware, thereby enhancing the credibility and reliability of the semiconductor memory device's operation, even at lower power supply voltages.
Implementation Method 1
a first capacitor for storing data... The first capacitor has a second terminal for receiving a first plate voltage... a first reference capacitor... The first reference capacitor has a second terminal for receiving a first reference plate voltage
Data Source
AI summary
A semiconductor memory device includes a memory cell and a first reference memory cell. The memory cell includes a first switching element and a first capacitor for storing data. The first switching element is controlled by a first wordline, and has a first terminal connected to a first terminal of the first capacitor and a second terminal connected to a first bitline. The first capacitor has a second terminal for receiving a first plate voltage. The first reference memory cell includes a first reference switching element and a first capacitor. The first switching element is controlled by a first reference wordline, and has a first terminal connected to a first terminal of the first reference capacitor and a second terminal connected to a second bitline. The first reference capacitor has a second terminal receiving a first reference plate voltage different from the first plate voltage.