Memory Device Signal Line Capacitive Coupling Voltage Control
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Solution Overview
Problem
Next-generation memory devices face challenges in achieving high data integrity, non-volatility, and high-speed operation while minimizing power consumption, as existing technologies require complex charge pump circuits to generate high inhibit voltages, increasing area and power consumption.
Innovation Solution
A method of operating memory devices with cross-point architectures, where first and second signal lines are floated and inhibit voltages are applied, allowing voltage levels to be increased through capacitive coupling, eliminating the need for charge pump circuits and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If charge pump circuits are used to generate high inhibit voltages, then voltage levels can be increased, but area and power consumption increase
Solution Approach 1:
The patent extracts and eliminates the charge pump circuit from the memory device architecture. Instead of using a charge pump to generate high inhibit voltages, the invention applies inhibit voltages directly through signal lines, removing the problematic component that caused both area occupation and power consumption issues while maintaining data integrity through direct voltage application
Solution Approach 2:
The patent introduces signal lines as intermediaries to transfer inhibit voltages directly to memory cells. These signal lines act as mediators between the voltage source and memory cells, enabling high inhibit voltages to be applied without requiring a charge pump circuit, thus resolving the contradiction between power consumption and data integrity
2Reliability
If charge pump circuits are used to generate high inhibit voltages, then voltage levels can be increased, but area occupancy increases
Solution Approach 1:
The patent removes the charge pump circuit from the memory device architecture, extracting the problematic component that occupied significant area. The inhibition function is achieved through direct voltage application via signal lines, eliminating the need for additional circuitry and reducing overall device area while maintaining data integrity
Solution Approach 2:
The signal lines in the patent serve multiple functions: they transmit data signals and simultaneously transmit inhibit voltages. This multi-functionality eliminates the need for separate charge pump circuits dedicated to voltage generation, thereby reducing area occupancy while maintaining the ability to ensure data integrity through proper voltage application
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient voltage level increase without charge pumps, enhancing data integrity and speed while reducing power consumption and area occupancy, thus addressing the limitations of existing memory technologies.
Implementation Method 1
increasing voltage levels of the plurality of first signal lines to a first inhibit voltage level through capacitive coupling between the plurality of first signal lines which are floated and the plurality of second signal lines to which the second inhibit voltage is applied
Data Source
AI summary
A method is for operating a memory device including a plurality of memory cells disposed in regions where a plurality of first signal lines and a plurality of second signal lines cross each other. The method includes applying an initial voltage to the plurality of first signal lines, floating the plurality of first signal lines to which the initial voltage is applied, applying a second inhibit voltage to the plurality of second signal lines, and increasing voltage levels of the plurality of first signal lines to a first inhibit voltage level via capacitive coupling between the plurality of first signal lines which are floated and the plurality of second signal lines to which the second inhibit voltage is applied.