Memory Device Peak Current Reduction via Source Precharging
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Solution Overview
Problem
Memory devices face challenges in reducing peak current consumption during programming operations, which can lead to inefficiencies and potential overheating issues.
Innovation Solution
The method involves precharging channel regions of memory cell strings through a common source line and setting a bit line voltage at a predetermined time, allowing for simultaneous but temporally distributed current consumption to reduce peak current levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program voltage is applied to selected memory blocks and verify operations are performed, then data storage and verification are achieved, but peak current consumption increases
Solution Approach 1:
The patent applies preliminary action by precharging the common source line to a first voltage level before applying the program voltage to the selected memory block. This precharging step prepares the electrical environment in advance, allowing the program operation to proceed with reduced peak current consumption during the verify step, thus resolving the contradiction between ensuring reliable program operations and reducing peak current usage.
2Productivity
If multiple memory cell strings are programmed simultaneously, then programming speed is improved, but current consumption increases
Solution Approach 1:
The patent employs dynamics by selectively controlling the timing and voltage levels applied to different memory cell strings during programming operations. By dynamically adjusting which strings are programmed at different times and at what voltage levels, the system achieves high programming throughput while managing peak current consumption, thus resolving the contradiction between programming speed and current consumption.
3Speed
If bit line voltage is set early during precharging, then operation speed is improved, but current peak increases
Solution Approach 1:
The patent applies preliminary action by setting the bit line voltage to a first voltage level during the precharging phase before the actual program operation begins. This early voltage setting prepares the bit lines for rapid operation while the common source line is being precharged, ensuring high operation speed. The bit line voltage is then adjusted to a second voltage level during the verify operation, managing the peak current by spreading the voltage transitions over time rather than applying all voltages simultaneously.
Data Source
AI summary
A memory device capable of reducing a peak current includes a plurality of memory cell strings each including a plurality of memory cells connected between a common source line and a bit line, a source select line connected between the common source line and the plurality of memory cells, and a drain select line connected between the bit line and the plurality of memory cells. A method for operating the memory device includes: precharging channel regions of a plurality of memory cell strings through a common source line; and setting a bit line voltage applied to the bit line, after starting precharging the channel regions of the plurality of memory cell strings, while the channel regions of the plurality of memory cell strings are being precharged.