Semiconductor Memory Device Staged Source Select Voltage Control

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Solution Overview

Problem

Semiconductor memory devices face challenges in reducing peak current consumption during programming operations, which can lead to inefficiencies and potential overheating issues due to concentrated current usage.

Innovation Solution

The semiconductor memory device employs a method where the voltage of a common source line and source select lines are increased in a controlled manner, allowing the bit line voltage to be set while the source select line voltage transitions from a first to a second level, thereby dispersing the current consumption over time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If voltage is applied to program memory cells simultaneously, then programming speed is improved, but peak current consumption increases

Engineering Contradiction:
Improveprogramming speedVSAvoidpeak current consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The memory block is divided into multiple sub-blocks, each with its own source select line. This segmentation allows independent control of programming operations in different sub-blocks, enabling current consumption to be distributed across multiple time slots rather than concentrated simultaneously, thus reducing peak current while maintaining overall programming speed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements staged voltage application where source select line voltages are increased in multiple steps (first voltage level, then second voltage level) rather than all at once. This periodic action distributes the current consumption over time, reducing peak current requirements while completing the programming operation within an acceptable time frame

Inventive Principle:
Principle #19Periodic action

2Productivity

If multiple source select lines are activated simultaneously, then programming efficiency is improved, but current consumption is concentrated

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidcurrent consumption concentration
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

Source select lines are segmented and assigned to different sub-blocks, allowing the programming operation to be divided into manageable portions. This enables efficient programming across multiple sub-blocks while controlling current consumption by activating source select lines in a staged manner rather than all simultaneously

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary voltage to the common source line before activating source select lines. This preliminary action prepares the electrical environment, reducing the instantaneous current demand when source select lines are subsequently activated, thereby improving programming efficiency without concentrating excessive current

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If bit line voltage is set after source select line voltage increases, then current control is improved, but operation timing becomes complex

Engineering Contradiction:
Improvecurrent controlVSAvoidoperation timing
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The operation timing is segmented into distinct phases: common source line voltage application, first source select line voltage level, bit line voltage setting, and second source select line voltage level. This segmented timing approach, while detailed, provides systematic current control at each stage, managing complexity through structured sequencing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic voltage adjustment where source select line voltages transition from a first level to a second level based on programming progress. This dynamic approach optimizes current control throughout the operation, with timing complexity managed through coordinated voltage transitions rather than static configurations

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11410731B2Semiconductor memory device and method of operating the same
Publication Date: 2022.08.09 SK HYNIX INC
  • US11410731B2 patent drawing
  • US11410731B2 patent drawing
  • US11410731B2 patent drawing

AI summary

Provided herein is a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory block, a peripheral circuit, and a control logic. The memory block includes a plurality of sub-blocks coupled to a plurality of source select lines, respectively. The peripheral circuit performs a program operation on the memory block. The control logic is configured to control the peripheral circuit to increase a voltage of a common source line that is coupled to the memory block, increase a voltage of at least one source select line, among the plurality of source select lines, to a first voltage level, and set a voltage of a bit line that is coupled to the memory block and increase the voltage of at least one source select line from the first voltage level to a second voltage level.