Semiconductor Memory Device Standby Current Reduction
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Solution Overview
Problem
Semiconductor memory devices face reliability issues due to unwanted standby current consumption through current paths between dummy and defective cells, which can degrade the performance and reliability of the device.
Innovation Solution
A semiconductor memory device with a bias application unit that supplies multiple voltage levels to dummy bit lines and a control unit to measure and minimize standby currents, using a mode register set and fuse to apply the optimal bias voltage, reducing standby current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a dummy bit line is included in the memory array to replace defective cells, then cell replacement capability is improved, but standby current consumption increases due to unwanted current paths
Solution Approach 1:
The patent applies a bias voltage to the dummy bit line to change its electrical state, creating a high-impedance condition that blocks unwanted standby current while maintaining the dummy cell's functionality for replacing defective cells
Solution Approach 2:
The bias voltage acts as an intermediary control signal that manages the electrical state of the dummy bit line, enabling it to selectively conduct or block current based on operational requirements
2Loss of energy
If multiple voltage levels are applied to dummy bit lines to reduce standby current, then power consumption is improved, but device complexity increases
Solution Approach 1:
The patent segments the voltage control by applying different voltage levels to different dummy bit lines based on their specific requirements, allowing selective optimization of each dummy bit line's standby current characteristics
Solution Approach 2:
The patent dynamically adjusts the bias voltage levels applied to dummy bit lines based on measured standby current values, enabling adaptive optimization of power consumption while managing complexity through controlled variability
Data Source
AI summary
A semiconductor memory device comprises a memory array including a plurality of bit lines and a plurality of dummy bit lines, a bias application unit configured to supply bias voltages having a plurality of voltage levels to the plurality of dummy bit lines, a standby current measuring unit configured to measure a value of at least one of standby currents between at least one of the plurality of bit lines and at least one of the plurality of dummy bit lines. Each of the standby currents is generated by each of the bias voltages applied by the bias application unit.